diff options
author | Alex Williamson <alex.williamson@redhat.com> | 2011-11-11 12:07:36 -0500 |
---|---|---|
committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-12-05 13:22:15 -0500 |
commit | 91f57d5e1be3db1e079c8696f1eab214f1c7922d (patch) | |
tree | 58d4a2a2fa41185c0fe64f8ac7395215fd27d2a1 /drivers/pci | |
parent | 60fe823837d10673500ff685c01eb2f896fe5849 (diff) |
PCI: More PRI/PASID cleanup
More consistency cleanups. Drop the _OFF, separate and indent
CTRL/CAP/STATUS bit definitions. This helped find the previous
mis-use of bit 0 in the PASID capability register.
Reviewed-by: Joerg Roedel <joerg.roedel@amd.com>
Tested-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/ats.c | 69 |
1 files changed, 35 insertions, 34 deletions
diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c index 8e95a123d37a..2df49af6cc90 100644 --- a/drivers/pci/ats.c +++ b/drivers/pci/ats.c | |||
@@ -178,17 +178,18 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs) | |||
178 | if (!pos) | 178 | if (!pos) |
179 | return -EINVAL; | 179 | return -EINVAL; |
180 | 180 | ||
181 | pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control); | 181 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
182 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status); | 182 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
183 | if ((control & PCI_PRI_ENABLE) || !(status & PCI_PRI_STATUS_STOPPED)) | 183 | if ((control & PCI_PRI_CTRL_ENABLE) || |
184 | !(status & PCI_PRI_STATUS_STOPPED)) | ||
184 | return -EBUSY; | 185 | return -EBUSY; |
185 | 186 | ||
186 | pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ_OFF, &max_requests); | 187 | pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests); |
187 | reqs = min(max_requests, reqs); | 188 | reqs = min(max_requests, reqs); |
188 | pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ_OFF, reqs); | 189 | pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs); |
189 | 190 | ||
190 | control |= PCI_PRI_ENABLE; | 191 | control |= PCI_PRI_CTRL_ENABLE; |
191 | pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control); | 192 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
192 | 193 | ||
193 | return 0; | 194 | return 0; |
194 | } | 195 | } |
@@ -209,9 +210,9 @@ void pci_disable_pri(struct pci_dev *pdev) | |||
209 | if (!pos) | 210 | if (!pos) |
210 | return; | 211 | return; |
211 | 212 | ||
212 | pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control); | 213 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
213 | control &= ~PCI_PRI_ENABLE; | 214 | control &= ~PCI_PRI_CTRL_ENABLE; |
214 | pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control); | 215 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
215 | } | 216 | } |
216 | EXPORT_SYMBOL_GPL(pci_disable_pri); | 217 | EXPORT_SYMBOL_GPL(pci_disable_pri); |
217 | 218 | ||
@@ -230,9 +231,9 @@ bool pci_pri_enabled(struct pci_dev *pdev) | |||
230 | if (!pos) | 231 | if (!pos) |
231 | return false; | 232 | return false; |
232 | 233 | ||
233 | pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control); | 234 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
234 | 235 | ||
235 | return (control & PCI_PRI_ENABLE) ? true : false; | 236 | return (control & PCI_PRI_CTRL_ENABLE) ? true : false; |
236 | } | 237 | } |
237 | EXPORT_SYMBOL_GPL(pci_pri_enabled); | 238 | EXPORT_SYMBOL_GPL(pci_pri_enabled); |
238 | 239 | ||
@@ -252,13 +253,13 @@ int pci_reset_pri(struct pci_dev *pdev) | |||
252 | if (!pos) | 253 | if (!pos) |
253 | return -EINVAL; | 254 | return -EINVAL; |
254 | 255 | ||
255 | pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control); | 256 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
256 | if (control & PCI_PRI_ENABLE) | 257 | if (control & PCI_PRI_CTRL_ENABLE) |
257 | return -EBUSY; | 258 | return -EBUSY; |
258 | 259 | ||
259 | control |= PCI_PRI_RESET; | 260 | control |= PCI_PRI_CTRL_RESET; |
260 | 261 | ||
261 | pci_write_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, control); | 262 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
262 | 263 | ||
263 | return 0; | 264 | return 0; |
264 | } | 265 | } |
@@ -285,10 +286,10 @@ bool pci_pri_stopped(struct pci_dev *pdev) | |||
285 | if (!pos) | 286 | if (!pos) |
286 | return true; | 287 | return true; |
287 | 288 | ||
288 | pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control); | 289 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
289 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status); | 290 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
290 | 291 | ||
291 | if (control & PCI_PRI_ENABLE) | 292 | if (control & PCI_PRI_CTRL_ENABLE) |
292 | return false; | 293 | return false; |
293 | 294 | ||
294 | return (status & PCI_PRI_STATUS_STOPPED) ? true : false; | 295 | return (status & PCI_PRI_STATUS_STOPPED) ? true : false; |
@@ -314,11 +315,11 @@ int pci_pri_status(struct pci_dev *pdev) | |||
314 | if (!pos) | 315 | if (!pos) |
315 | return -EINVAL; | 316 | return -EINVAL; |
316 | 317 | ||
317 | pci_read_config_word(pdev, pos + PCI_PRI_CONTROL_OFF, &control); | 318 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
318 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS_OFF, &status); | 319 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
319 | 320 | ||
320 | /* Stopped bit is undefined when enable == 1, so clear it */ | 321 | /* Stopped bit is undefined when enable == 1, so clear it */ |
321 | if (control & PCI_PRI_ENABLE) | 322 | if (control & PCI_PRI_CTRL_ENABLE) |
322 | status &= ~PCI_PRI_STATUS_STOPPED; | 323 | status &= ~PCI_PRI_STATUS_STOPPED; |
323 | 324 | ||
324 | return status; | 325 | return status; |
@@ -345,21 +346,21 @@ int pci_enable_pasid(struct pci_dev *pdev, int features) | |||
345 | if (!pos) | 346 | if (!pos) |
346 | return -EINVAL; | 347 | return -EINVAL; |
347 | 348 | ||
348 | pci_read_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, &control); | 349 | pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control); |
349 | pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported); | 350 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
350 | 351 | ||
351 | if (control & PCI_PASID_ENABLE) | 352 | if (control & PCI_PASID_CTRL_ENABLE) |
352 | return -EINVAL; | 353 | return -EINVAL; |
353 | 354 | ||
354 | supported &= PCI_PASID_EXEC | PCI_PASID_PRIV; | 355 | supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; |
355 | 356 | ||
356 | /* User wants to enable anything unsupported? */ | 357 | /* User wants to enable anything unsupported? */ |
357 | if ((supported & features) != features) | 358 | if ((supported & features) != features) |
358 | return -EINVAL; | 359 | return -EINVAL; |
359 | 360 | ||
360 | control = PCI_PASID_ENABLE | features; | 361 | control = PCI_PASID_CTRL_ENABLE | features; |
361 | 362 | ||
362 | pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control); | 363 | pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control); |
363 | 364 | ||
364 | return 0; | 365 | return 0; |
365 | } | 366 | } |
@@ -379,7 +380,7 @@ void pci_disable_pasid(struct pci_dev *pdev) | |||
379 | if (!pos) | 380 | if (!pos) |
380 | return; | 381 | return; |
381 | 382 | ||
382 | pci_write_config_word(pdev, pos + PCI_PASID_CONTROL_OFF, control); | 383 | pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control); |
383 | } | 384 | } |
384 | EXPORT_SYMBOL_GPL(pci_disable_pasid); | 385 | EXPORT_SYMBOL_GPL(pci_disable_pasid); |
385 | 386 | ||
@@ -390,8 +391,8 @@ EXPORT_SYMBOL_GPL(pci_disable_pasid); | |||
390 | * Returns a negative value when no PASI capability is present. | 391 | * Returns a negative value when no PASI capability is present. |
391 | * Otherwise is returns a bitmask with supported features. Current | 392 | * Otherwise is returns a bitmask with supported features. Current |
392 | * features reported are: | 393 | * features reported are: |
393 | * PCI_PASID_EXEC - Execute permission supported | 394 | * PCI_PASID_CAP_EXEC - Execute permission supported |
394 | * PCI_PASID_PRIV - Priviledged mode supported | 395 | * PCI_PASID_CAP_PRIV - Priviledged mode supported |
395 | */ | 396 | */ |
396 | int pci_pasid_features(struct pci_dev *pdev) | 397 | int pci_pasid_features(struct pci_dev *pdev) |
397 | { | 398 | { |
@@ -402,9 +403,9 @@ int pci_pasid_features(struct pci_dev *pdev) | |||
402 | if (!pos) | 403 | if (!pos) |
403 | return -EINVAL; | 404 | return -EINVAL; |
404 | 405 | ||
405 | pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported); | 406 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
406 | 407 | ||
407 | supported &= PCI_PASID_EXEC | PCI_PASID_PRIV; | 408 | supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; |
408 | 409 | ||
409 | return supported; | 410 | return supported; |
410 | } | 411 | } |
@@ -428,7 +429,7 @@ int pci_max_pasids(struct pci_dev *pdev) | |||
428 | if (!pos) | 429 | if (!pos) |
429 | return -EINVAL; | 430 | return -EINVAL; |
430 | 431 | ||
431 | pci_read_config_word(pdev, pos + PCI_PASID_CAP_OFF, &supported); | 432 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
432 | 433 | ||
433 | supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT; | 434 | supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT; |
434 | 435 | ||