diff options
author | Bjorn Helgaas <bhelgaas@google.com> | 2014-11-21 12:11:33 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-11-21 12:11:33 -0500 |
commit | 149792795d2bab33954bc025fcf145a8009683f6 (patch) | |
tree | aee13528ef690a64decf22e2c412b15644442a80 /drivers/pci | |
parent | 18e88beceb1838cfa7cc1a9abf16f5b419e11fdd (diff) | |
parent | f8338694270224970cbaae7e404517ec39f9c753 (diff) |
Merge branch 'pci/msi' into next
* pci/msi:
s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq()
Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()"
PCI/MSI: Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/msi.c | 29 |
1 files changed, 12 insertions, 17 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 9fab30af0e75..d9a92cf6a6d6 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include "pci.h" | 23 | #include "pci.h" |
24 | 24 | ||
25 | static int pci_msi_enable = 1; | 25 | static int pci_msi_enable = 1; |
26 | int pci_msi_ignore_mask; | ||
26 | 27 | ||
27 | #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) | 28 | #define msix_table_size(flags) ((flags & PCI_MSIX_FLAGS_QSIZE) + 1) |
28 | 29 | ||
@@ -163,11 +164,11 @@ static inline __attribute_const__ u32 msi_mask(unsigned x) | |||
163 | * reliably as devices without an INTx disable bit will then generate a | 164 | * reliably as devices without an INTx disable bit will then generate a |
164 | * level IRQ which will never be cleared. | 165 | * level IRQ which will never be cleared. |
165 | */ | 166 | */ |
166 | u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | 167 | u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) |
167 | { | 168 | { |
168 | u32 mask_bits = desc->masked; | 169 | u32 mask_bits = desc->masked; |
169 | 170 | ||
170 | if (!desc->msi_attrib.maskbit) | 171 | if (pci_msi_ignore_mask || !desc->msi_attrib.maskbit) |
171 | return 0; | 172 | return 0; |
172 | 173 | ||
173 | mask_bits &= ~mask; | 174 | mask_bits &= ~mask; |
@@ -177,14 +178,9 @@ u32 default_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | |||
177 | return mask_bits; | 178 | return mask_bits; |
178 | } | 179 | } |
179 | 180 | ||
180 | __weak u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | ||
181 | { | ||
182 | return default_msi_mask_irq(desc, mask, flag); | ||
183 | } | ||
184 | |||
185 | static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | 181 | static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) |
186 | { | 182 | { |
187 | desc->masked = arch_msi_mask_irq(desc, mask, flag); | 183 | desc->masked = __msi_mask_irq(desc, mask, flag); |
188 | } | 184 | } |
189 | 185 | ||
190 | /* | 186 | /* |
@@ -194,11 +190,15 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | |||
194 | * file. This saves a few milliseconds when initialising devices with lots | 190 | * file. This saves a few milliseconds when initialising devices with lots |
195 | * of MSI-X interrupts. | 191 | * of MSI-X interrupts. |
196 | */ | 192 | */ |
197 | u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag) | 193 | u32 __msix_mask_irq(struct msi_desc *desc, u32 flag) |
198 | { | 194 | { |
199 | u32 mask_bits = desc->masked; | 195 | u32 mask_bits = desc->masked; |
200 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + | 196 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
201 | PCI_MSIX_ENTRY_VECTOR_CTRL; | 197 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
198 | |||
199 | if (pci_msi_ignore_mask) | ||
200 | return 0; | ||
201 | |||
202 | mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; | 202 | mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT; |
203 | if (flag) | 203 | if (flag) |
204 | mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; | 204 | mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT; |
@@ -207,14 +207,9 @@ u32 default_msix_mask_irq(struct msi_desc *desc, u32 flag) | |||
207 | return mask_bits; | 207 | return mask_bits; |
208 | } | 208 | } |
209 | 209 | ||
210 | __weak u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag) | ||
211 | { | ||
212 | return default_msix_mask_irq(desc, flag); | ||
213 | } | ||
214 | |||
215 | static void msix_mask_irq(struct msi_desc *desc, u32 flag) | 210 | static void msix_mask_irq(struct msi_desc *desc, u32 flag) |
216 | { | 211 | { |
217 | desc->masked = arch_msix_mask_irq(desc, flag); | 212 | desc->masked = __msix_mask_irq(desc, flag); |
218 | } | 213 | } |
219 | 214 | ||
220 | static void msi_set_mask_bit(struct irq_data *data, u32 flag) | 215 | static void msi_set_mask_bit(struct irq_data *data, u32 flag) |
@@ -869,7 +864,7 @@ void pci_msi_shutdown(struct pci_dev *dev) | |||
869 | /* Return the device with MSI unmasked as initial states */ | 864 | /* Return the device with MSI unmasked as initial states */ |
870 | mask = msi_mask(desc->msi_attrib.multi_cap); | 865 | mask = msi_mask(desc->msi_attrib.multi_cap); |
871 | /* Keep cached state to be restored */ | 866 | /* Keep cached state to be restored */ |
872 | arch_msi_mask_irq(desc, mask, ~mask); | 867 | __msi_mask_irq(desc, mask, ~mask); |
873 | 868 | ||
874 | /* Restore dev->irq to its default pin-assertion irq */ | 869 | /* Restore dev->irq to its default pin-assertion irq */ |
875 | dev->irq = desc->msi_attrib.default_irq; | 870 | dev->irq = desc->msi_attrib.default_irq; |
@@ -967,7 +962,7 @@ void pci_msix_shutdown(struct pci_dev *dev) | |||
967 | /* Return the device with MSI-X masked as initial states */ | 962 | /* Return the device with MSI-X masked as initial states */ |
968 | list_for_each_entry(entry, &dev->msi_list, list) { | 963 | list_for_each_entry(entry, &dev->msi_list, list) { |
969 | /* Keep cached states to be restored */ | 964 | /* Keep cached states to be restored */ |
970 | arch_msix_mask_irq(entry, 1); | 965 | __msix_mask_irq(entry, 1); |
971 | } | 966 | } |
972 | 967 | ||
973 | msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); | 968 | msix_clear_and_set_ctrl(dev, PCI_MSIX_FLAGS_ENABLE, 0); |