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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2008-12-24 03:27:04 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-01-16 15:35:25 -0500
commit0db29af1e767464d71b89410d61a1e5b668d0370 (patch)
tree493d48656dd10cdd5e7e31f7a70de525e6bbdad2 /drivers/pci
parentb762666cc7c9f83ac5759127c29dfad438c09e48 (diff)
PCI/MSI: bugfix/utilize for msi_capability_init()
This patch fix a following bug and does a cleanup. bug: commit 5993760f7fc75b77e4701f1e56dc84c0d6cf18d5 had a wrong change (since is_64 is boolean[0|1]): - pci_write_config_dword(dev, - msi_mask_bits_reg(pos, is_64bit_address(control)), - maskbits); + pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits); utilize: Unify separated if (entry->msi_attrib.maskbit) statements. Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Acked-by: "Jike Song" <albcamus@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/msi.c16
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index b4a90badd0a6..896a15d70f5b 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -398,21 +398,19 @@ static int msi_capability_init(struct pci_dev *dev)
398 entry->msi_attrib.masked = 1; 398 entry->msi_attrib.masked = 1;
399 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ 399 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
400 entry->msi_attrib.pos = pos; 400 entry->msi_attrib.pos = pos;
401 if (entry->msi_attrib.maskbit) {
402 entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos,
403 entry->msi_attrib.is_64);
404 }
405 entry->dev = dev; 401 entry->dev = dev;
406 if (entry->msi_attrib.maskbit) { 402 if (entry->msi_attrib.maskbit) {
407 unsigned int maskbits, temp; 403 unsigned int base, maskbits, temp;
404
405 base = msi_mask_bits_reg(pos, entry->msi_attrib.is_64);
406 entry->mask_base = (void __iomem *)(long)base;
407
408 /* All MSIs are unmasked by default, Mask them all */ 408 /* All MSIs are unmasked by default, Mask them all */
409 pci_read_config_dword(dev, 409 pci_read_config_dword(dev, base, &maskbits);
410 msi_mask_bits_reg(pos, entry->msi_attrib.is_64),
411 &maskbits);
412 temp = (1 << multi_msi_capable(control)); 410 temp = (1 << multi_msi_capable(control));
413 temp = ((temp - 1) & ~temp); 411 temp = ((temp - 1) & ~temp);
414 maskbits |= temp; 412 maskbits |= temp;
415 pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits); 413 pci_write_config_dword(dev, base, maskbits);
416 entry->msi_attrib.maskbits_mask = temp; 414 entry->msi_attrib.maskbits_mask = temp;
417 } 415 }
418 list_add_tail(&entry->list, &dev->msi_list); 416 list_add_tail(&entry->list, &dev->msi_list);