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authorTim Yamin <tim.yamin@zonbu.com>2007-11-01 19:14:54 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2008-02-01 18:04:20 -0500
commit53a9bf4267b8b1f958dbeb7c8c1ef21c82229b71 (patch)
tree96f564776286237d0aeb8ab6840b5040ac6a3144 /drivers/pci
parent2b1afa87e11e979ab4838e043ffd0175657da437 (diff)
PCI: VIA CX700 quirk to disable PCI Bus Parking
PCI Bus Parking and PCI Master read caching on the VIA CX700 is buggy and can lead to problems such as USB2.0 packet loss if a VT6212L controller is on the PCI bus. It's disabled by default, but some BIOSes turn these features on and this patch reverts the configuration to the safe defaults. Signed-off-by: Tim Yamin <tim.yamin@zonbu.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/quirks.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 53ee09a592b1..ce35a8f956fe 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1611,6 +1611,34 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE,
1611DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE, 1611DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE,
1612 quirk_nvidia_ck804_pcie_aer_ext_cap); 1612 quirk_nvidia_ck804_pcie_aer_ext_cap);
1613 1613
1614static void __devinit quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
1615{
1616 /*
1617 * Disable PCI Bus Parking and PCI Master read caching on CX700
1618 * which causes unspecified timing errors with a VT6212L on the PCI
1619 * bus leading to USB2.0 packet loss. The defaults are that these
1620 * features are turned off but some BIOSes turn them on.
1621 */
1622
1623 uint8_t b;
1624 if (pci_read_config_byte(dev, 0x76, &b) == 0) {
1625 if (b & 0x40) {
1626 /* Turn off PCI Bus Parking */
1627 pci_write_config_byte(dev, 0x76, b ^ 0x40);
1628
1629 /* Turn off PCI Master read caching */
1630 pci_write_config_byte(dev, 0x72, 0x0);
1631 pci_write_config_byte(dev, 0x75, 0x1);
1632 pci_write_config_byte(dev, 0x77, 0x0);
1633
1634 printk(KERN_INFO
1635 "PCI: VIA CX700 PCI parking/caching fixup on %s\n",
1636 pci_name(dev));
1637 }
1638 }
1639}
1640DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching);
1641
1614#ifdef CONFIG_PCI_MSI 1642#ifdef CONFIG_PCI_MSI
1615/* Some chipsets do not support MSI. We cannot easily rely on setting 1643/* Some chipsets do not support MSI. We cannot easily rely on setting
1616 * PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually 1644 * PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually