vsprintf: use %pR, %pr instead of %pRt, %pRf

Jesse accidentally applied v1 [1] of the patchset instead of v2 [2].  This
is the diff between v1 and v2.

The changes in this patch are:
    - tidied vsprintf stack buffer to shrink and compute size more
      accurately
    - use %pR for decoding and %pr for "raw" (with type and flags) instead
      of adding %pRt and %pRf

[1] http://lkml.org/lkml/2009/10/6/491
[2] http://lkml.org/lkml/2009/10/13/441

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

5 files changed, 58 insertions, 62 deletions

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 557218222826..f0da1676d2be 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1713,7 +1713,7 @@ static int __pci_request_region(struct pci_dev *pdev, int bar, const char *res_n
         return 0;
 
 err_out:
-        dev_warn(&pdev->dev, "BAR %d: can't reserve %pRt\n", bar,
+        dev_warn(&pdev->dev, "BAR %d: can't reserve %pR\n", bar,
                  &pdev->resource[bar]);
         return -EBUSY;
 }
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 4842b09b7f3c..4c4aca53ae09 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -225,12 +225,13 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 if (!sz64)
                         goto fail;
 
-                res->flags |= IORESOURCE_MEM_64;
-
                 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
                         dev_err(&dev->dev, "can't handle 64-bit BAR\n");
                         goto fail;
-                } else if ((sizeof(resource_size_t) < 8) && l) {
+                }
+
+                res->flags |= IORESOURCE_MEM_64;
+                if ((sizeof(resource_size_t) < 8) && l) {
                         /* Address above 32-bit boundary; disable the BAR */
                         pci_write_config_dword(dev, pos, 0);
                         pci_write_config_dword(dev, pos + 4, 0);
@@ -239,7 +240,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 } else {
                         res->start = l64;
                         res->end = l64 + sz64;
-                        dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pRt\n",
+                        dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
                                    pos, res);
                 }
         } else {
@@ -251,7 +252,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                 res->start = l;
                 res->end = l + sz;
 
-                dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pRt\n", pos, res);
+                dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
         }
 
  out:
@@ -319,7 +320,7 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                         res->start = base;
                 if (!res->end)
                         res->end = limit + 0xfff;
-                dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res);
+                dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 
         res = child->resource[1];
@@ -331,7 +332,7 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                 res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
                 res->start = base;
                 res->end = limit + 0xfffff;
-                dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res);
+                dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 
         res = child->resource[2];
@@ -370,7 +371,7 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child)
                         res->flags |= IORESOURCE_MEM_64;
                 res->start = base;
                 res->end = limit + 0xfffff;
-                dev_printk(KERN_DEBUG, &dev->dev, "bridge window: %pRt\n", res);
+                dev_printk(KERN_DEBUG, &dev->dev, "  bridge window %pR\n", res);
         }
 }
 
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index c0c4537d66da..7cfa7c38d318 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -357,7 +357,7 @@ static void __devinit quirk_io_region(struct pci_dev *dev, unsigned region,
                 pcibios_bus_to_resource(dev, res, &bus_region);
 
                 pci_claim_resource(dev, nr);
-                dev_info(&dev->dev, "quirk: region %04x-%04x claimed by %s\n", region, region + size - 1, name);
+                dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
         }
 }       
 
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index ceb75333862b..ed6916bac675 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -71,53 +71,50 @@ static void pbus_assign_resources_sorted(const struct pci_bus *bus)
 void pci_setup_cardbus(struct pci_bus *bus)
 {
         struct pci_dev *bridge = bus->self;
+        struct resource *res;
         struct pci_bus_region region;
 
         dev_info(&bridge->dev, "CardBus bridge, secondary bus %04x:%02x\n",
                  pci_domain_nr(bus), bus->number);
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
-        if (bus->resource[0]->flags & IORESOURCE_IO) {
+        res = bus->resource[0];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_IO) {
                 /*
                  * The IO resource is allocated a range twice as large as it
                  * would normally need.  This allows us to set both IO regs.
                  */
-                dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_IO_BASE_0,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_0,
                                         region.end);
         }
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
-        if (bus->resource[1]->flags & IORESOURCE_IO) {
-                dev_info(&bridge->dev, "  IO window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+        res = bus->resource[1];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_IO) {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_IO_LIMIT_1,
                                         region.end);
         }
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
-        if (bus->resource[2]->flags & IORESOURCE_MEM) {
-                dev_info(&bridge->dev, "  PREFETCH window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+        res = bus->resource[2];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_MEM) {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_0,
                                         region.end);
         }
 
-        pcibios_resource_to_bus(bridge, &region, bus->resource[3]);
-        if (bus->resource[3]->flags & IORESOURCE_MEM) {
-                dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
-                       (unsigned long)region.start,
-                       (unsigned long)region.end);
+        res = bus->resource[3];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_MEM) {
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
                                         region.start);
                 pci_write_config_dword(bridge, PCI_CB_MEMORY_LIMIT_1,
@@ -140,6 +137,7 @@ EXPORT_SYMBOL(pci_setup_cardbus);
 static void pci_setup_bridge(struct pci_bus *bus)
 {
         struct pci_dev *bridge = bus->self;
+        struct resource *res;
         struct pci_bus_region region;
         u32 l, bu, lu, io_upper16;
         int pref_mem64;
@@ -151,23 +149,22 @@ static void pci_setup_bridge(struct pci_bus *bus)
                  pci_domain_nr(bus), bus->number);
 
         /* Set up the top and bottom of the PCI I/O segment for this bus. */
-        pcibios_resource_to_bus(bridge, &region, bus->resource[0]);
-        if (bus->resource[0]->flags & IORESOURCE_IO) {
+        res = bus->resource[0];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_IO) {
                 pci_read_config_dword(bridge, PCI_IO_BASE, &l);
                 l &= 0xffff0000;
                 l |= (region.start >> 8) & 0x00f0;
                 l |= region.end & 0xf000;
                 /* Set up upper 16 bits of I/O base/limit. */
                 io_upper16 = (region.end & 0xffff0000) | (region.start >> 16);
-                dev_info(&bridge->dev, "  IO window: %#04lx-%#04lx\n",
-                    (unsigned long)region.start,
-                    (unsigned long)region.end);
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
         }
         else {
                 /* Clear upper 16 bits of I/O base/limit. */
                 io_upper16 = 0;
                 l = 0x00f0;
-                dev_info(&bridge->dev, "  IO window: disabled\n");
+                dev_info(&bridge->dev, "  bridge window [io  disabled]\n");
         }
         /* Temporarily disable the I/O range before updating PCI_IO_BASE. */
         pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, 0x0000ffff);
@@ -178,17 +175,16 @@ static void pci_setup_bridge(struct pci_bus *bus)
 
         /* Set up the top and bottom of the PCI Memory segment
            for this bus. */
-        pcibios_resource_to_bus(bridge, &region, bus->resource[1]);
-        if (bus->resource[1]->flags & IORESOURCE_MEM) {
+        res = bus->resource[1];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_MEM) {
                 l = (region.start >> 16) & 0xfff0;
                 l |= region.end & 0xfff00000;
-                dev_info(&bridge->dev, "  MEM window: %#08lx-%#08lx\n",
-                    (unsigned long)region.start,
-                    (unsigned long)region.end);
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
         }
         else {
                 l = 0x0000fff0;
-                dev_info(&bridge->dev, "  MEM window: disabled\n");
+                dev_info(&bridge->dev, "  bridge window [mem disabled]\n");
         }
         pci_write_config_dword(bridge, PCI_MEMORY_BASE, l);
 
@@ -200,24 +196,21 @@ static void pci_setup_bridge(struct pci_bus *bus)
         /* Set up PREF base/limit. */
         pref_mem64 = 0;
         bu = lu = 0;
-        pcibios_resource_to_bus(bridge, &region, bus->resource[2]);
-        if (bus->resource[2]->flags & IORESOURCE_PREFETCH) {
-                int width = 8;
+        res = bus->resource[2];
+        pcibios_resource_to_bus(bridge, &region, res);
+        if (res->flags & IORESOURCE_PREFETCH) {
                 l = (region.start >> 16) & 0xfff0;
                 l |= region.end & 0xfff00000;
-                if (bus->resource[2]->flags & IORESOURCE_MEM_64) {
+                if (res->flags & IORESOURCE_MEM_64) {
                         pref_mem64 = 1;
                         bu = upper_32_bits(region.start);
                         lu = upper_32_bits(region.end);
-                        width = 16;
                 }
-                dev_info(&bridge->dev, "  PREFETCH window: %#0*llx-%#0*llx\n",
-                                width, (unsigned long long)region.start,
-                                width, (unsigned long long)region.end);
+                dev_info(&bridge->dev, "  bridge window %pR\n", res);
         }
         else {
                 l = 0x0000fff0;
-                dev_info(&bridge->dev, "  PREFETCH window: disabled\n");
+                dev_info(&bridge->dev, "  bridge window [mem pref disabled]\n");
         }
         pci_write_config_dword(bridge, PCI_PREF_MEMORY_BASE, l);
 
@@ -391,7 +384,7 @@ static int pbus_size_mem(struct pci_bus *bus, unsigned long mask,
                         order = __ffs(align) - 20;
                         if (order > 11) {
                                 dev_warn(&dev->dev, "BAR %d: bad alignment %llx: "
-                                         "%pRt\n", i, (unsigned long long)align, r);
+                                         "%pR\n", i, (unsigned long long)align, r);
                                 r->flags = 0;
                                 continue;
                         }
@@ -582,7 +575,7 @@ static void pci_bus_dump_res(struct pci_bus *bus)
                 if (!res || !res->end)
                         continue;
 
-                dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pRt\n", i, res);
+                dev_printk(KERN_DEBUG, &bus->dev, "resource %d %pR\n", i, res);
         }
 }
 
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 5e78f2096ce8..357ca5c54607 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -51,9 +51,11 @@ void pci_update_resource(struct pci_dev *dev, int resno)
 
         pcibios_resource_to_bus(dev, &region, res);
 
-        dev_dbg(&dev->dev, "BAR %d: got %pRf (bus addr [%#llx-%#llx])\n",
-                resno, res, (unsigned long long)region.start,
-                (unsigned long long)region.end);
+        dev_dbg(&dev->dev, "BAR %d: got res %pR bus [%#llx-%#llx] "
+                "flags %#lx\n", resno, res,
+                 (unsigned long long)region.start,
+                 (unsigned long long)region.end,
+                 (unsigned long)res->flags);
 
         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
         if (res->flags & IORESOURCE_IO)
@@ -89,8 +91,8 @@ void pci_update_resource(struct pci_dev *dev, int resno)
                 }
         }
         res->flags &= ~IORESOURCE_UNSET;
-        dev_dbg(&dev->dev, "BAR %d: moved to bus addr [%#llx-%#llx]\n",
-                resno, (unsigned long long)region.start,
+        dev_dbg(&dev->dev, "BAR %d: moved to %pR (bus addr [%#llx-%#llx])\n",
+                resno, res, (unsigned long long)region.start,
                 (unsigned long long)region.end);
 }
 
@@ -108,7 +110,7 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
 
         if (err) {
                 const char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge";
-                dev_err(&dev->dev, "BAR %d: %s %s %pRt\n",
+                dev_err(&dev->dev, "BAR %d: %s of %s %pR\n",
                         resource,
                         root ? "address space collision on" :
                                 "no parent found for",
@@ -179,7 +181,7 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
 
         align = pci_resource_alignment(dev, res);
         if (!align) {
-                dev_info(&dev->dev, "BAR %d: can't allocate %pRf "
+                dev_info(&dev->dev, "BAR %d: can't allocate %pR "
                          "(bogus alignment)\n", resno, res);
                 return -EINVAL;
         }
@@ -196,7 +198,7 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
         }
 
         if (ret)
-                dev_info(&dev->dev, "BAR %d: can't allocate %pRt\n",
+                dev_info(&dev->dev, "BAR %d: can't allocate %pR\n",
                          resno, res);
 
         return ret;
@@ -222,7 +224,7 @@ void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
 
                 r_align = pci_resource_alignment(dev, r);
                 if (!r_align) {
-                        dev_warn(&dev->dev, "BAR %d: bogus alignment %pRf\n",
+                        dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
                                  i, r);
                         continue;
                 }