aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci
diff options
context:
space:
mode:
authorAuke Kok <auke-jan.h.kok@intel.com>2007-06-08 18:46:36 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2007-07-11 19:02:10 -0400
commit44c10138fd4bbc4b6d6bff0873c24902f2a9da65 (patch)
tree6e16d3ec80c87490dc743f72da086356f2906ace /drivers/pci
parentb8a3a5214d7cc115f1ca3a3967b7229d97c46f4a (diff)
PCI: Change all drivers to use pci_device->revision
Instead of all drivers reading pci config space to get the revision ID, they can now use the pci_device->revision member. This exposes some issues where drivers where reading a word or a dword for the revision number, and adding useless error-handling around the read. Some drivers even just read it for no purpose of all. In devices where the revision ID is being copied over and used in what appears to be the equivalent of hotpath, I have left the copy code and the cached copy as not to influence the driver's performance. Compile tested with make all{yes,mod}config on x86_64 and i386. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Acked-by: Dave Jones <davej@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/hotplug/cpqphp_core.c12
-rw-r--r--drivers/pci/quirks.c14
2 files changed, 9 insertions, 17 deletions
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index 5617cfdadc5c..d590a99930fa 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -796,7 +796,6 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
796 u8 num_of_slots = 0; 796 u8 num_of_slots = 0;
797 u8 hp_slot = 0; 797 u8 hp_slot = 0;
798 u8 device; 798 u8 device;
799 u8 rev;
800 u8 bus_cap; 799 u8 bus_cap;
801 u16 temp_word; 800 u16 temp_word;
802 u16 vendor_id; 801 u16 vendor_id;
@@ -823,9 +822,8 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
823 } 822 }
824 dbg("Vendor ID: %x\n", vendor_id); 823 dbg("Vendor ID: %x\n", vendor_id);
825 824
826 rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 825 dbg("revision: %d\n", pdev->revision);
827 dbg("revision: %d\n", rev); 826 if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
828 if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
829 err(msg_HPC_rev_error); 827 err(msg_HPC_rev_error);
830 rc = -ENODEV; 828 rc = -ENODEV;
831 goto err_disable_device; 829 goto err_disable_device;
@@ -836,7 +834,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
836 * For Intel, each SSID bit identifies a PHP capability. 834 * For Intel, each SSID bit identifies a PHP capability.
837 * Also Intel HPC's may have RID=0. 835 * Also Intel HPC's may have RID=0.
838 */ 836 */
839 if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { 837 if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
840 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs 838 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
841 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); 839 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
842 if (rc) { 840 if (rc) {
@@ -870,7 +868,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
870 868
871 switch (subsystem_vid) { 869 switch (subsystem_vid) {
872 case PCI_VENDOR_ID_COMPAQ: 870 case PCI_VENDOR_ID_COMPAQ:
873 if (rev >= 0x13) { /* CIOBX */ 871 if (pdev->revision >= 0x13) { /* CIOBX */
874 ctrl->push_flag = 1; 872 ctrl->push_flag = 1;
875 ctrl->slot_switch_type = 1; 873 ctrl->slot_switch_type = 1;
876 ctrl->push_button = 1; 874 ctrl->push_button = 1;
@@ -1075,7 +1073,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1075 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus)); 1073 memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1076 1074
1077 ctrl->bus = pdev->bus->number; 1075 ctrl->bus = pdev->bus->number;
1078 ctrl->rev = rev; 1076 ctrl->rev = pdev->revision;
1079 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus, 1077 dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1080 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); 1078 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1081 1079
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 75bd6a8648f6..f75ade6f0602 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -587,10 +587,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk_via_v
587 */ 587 */
588static void __devinit quirk_amd_ioapic(struct pci_dev *dev) 588static void __devinit quirk_amd_ioapic(struct pci_dev *dev)
589{ 589{
590 u8 rev; 590 if (dev->revision >= 0x02) {
591
592 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
593 if (rev >= 0x02) {
594 printk(KERN_WARNING "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n"); 591 printk(KERN_WARNING "I/O APIC: AMD Erratum #22 may be present. In the event of instability try\n");
595 printk(KERN_WARNING " : booting with the \"noapic\" option.\n"); 592 printk(KERN_WARNING " : booting with the \"noapic\" option.\n");
596 } 593 }
@@ -610,13 +607,12 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw );
610#define AMD8131_NIOAMODE_BIT 0 607#define AMD8131_NIOAMODE_BIT 0
611static void quirk_amd_8131_ioapic(struct pci_dev *dev) 608static void quirk_amd_8131_ioapic(struct pci_dev *dev)
612{ 609{
613 unsigned char revid, tmp; 610 unsigned char tmp;
614 611
615 if (nr_ioapics == 0) 612 if (nr_ioapics == 0)
616 return; 613 return;
617 614
618 pci_read_config_byte(dev, PCI_REVISION_ID, &revid); 615 if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) {
619 if (revid == AMD8131_revA0 || revid == AMD8131_revB0) {
620 printk(KERN_INFO "Fixing up AMD8131 IOAPIC mode\n"); 616 printk(KERN_INFO "Fixing up AMD8131 IOAPIC mode\n");
621 pci_read_config_byte( dev, AMD8131_MISC, &tmp); 617 pci_read_config_byte( dev, AMD8131_MISC, &tmp);
622 tmp &= ~(1 << AMD8131_NIOAMODE_BIT); 618 tmp &= ~(1 << AMD8131_NIOAMODE_BIT);
@@ -859,10 +855,8 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, qu
859static void quirk_disable_pxb(struct pci_dev *pdev) 855static void quirk_disable_pxb(struct pci_dev *pdev)
860{ 856{
861 u16 config; 857 u16 config;
862 u8 rev;
863 858
864 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); 859 if (pdev->revision != 0x04) /* Only C0 requires this */
865 if (rev != 0x04) /* Only C0 requires this */
866 return; 860 return;
867 pci_read_config_word(pdev, 0x40, &config); 861 pci_read_config_word(pdev, 0x40, &config);
868 if (config & (1<<6)) { 862 if (config & (1<<6)) {