aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci
diff options
context:
space:
mode:
authorAlex Chiang <achiang@hp.com>2009-03-31 11:23:16 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-06-11 15:04:08 -0400
commit427438c61b0083a60bb953cb36cfdc5841f0bb03 (patch)
tree4583b0f23eed091006324bc1f3f61ed7fcd8a7ac /drivers/pci
parent861fefbf550d41e7a4f44584f3ec35977fa08bf1 (diff)
PCI Hotplug: cpqphp: fix comment style
Fix up comments from C++ to C-style, wrapping if necessary, etc. Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/hotplug/cpqphp.h22
-rw-r--r--drivers/pci/hotplug/cpqphp_core.c157
-rw-r--r--drivers/pci/hotplug/cpqphp_ctrl.c131
-rw-r--r--drivers/pci/hotplug/cpqphp_nvram.c79
-rw-r--r--drivers/pci/hotplug/cpqphp_pci.c313
5 files changed, 387 insertions, 315 deletions
diff --git a/drivers/pci/hotplug/cpqphp.h b/drivers/pci/hotplug/cpqphp.h
index b627dfd74500..e15d657368f0 100644
--- a/drivers/pci/hotplug/cpqphp.h
+++ b/drivers/pci/hotplug/cpqphp.h
@@ -190,7 +190,9 @@ struct hrt {
190 u32 reserved2; 190 u32 reserved2;
191} __attribute__ ((packed)); 191} __attribute__ ((packed));
192 192
193/* offsets to the hotplug resource table registers based on the above structure layout */ 193/* offsets to the hotplug resource table registers based on the above
194 * structure layout
195 */
194enum hrt_offsets { 196enum hrt_offsets {
195 SIG0 = offsetof(struct hrt, sig0), 197 SIG0 = offsetof(struct hrt, sig0),
196 SIG1 = offsetof(struct hrt, sig1), 198 SIG1 = offsetof(struct hrt, sig1),
@@ -217,7 +219,9 @@ struct slot_rt {
217 u16 pre_mem_length; 219 u16 pre_mem_length;
218} __attribute__ ((packed)); 220} __attribute__ ((packed));
219 221
220/* offsets to the hotplug slot resource table registers based on the above structure layout */ 222/* offsets to the hotplug slot resource table registers based on the above
223 * structure layout
224 */
221enum slot_rt_offsets { 225enum slot_rt_offsets {
222 DEV_FUNC = offsetof(struct slot_rt, dev_func), 226 DEV_FUNC = offsetof(struct slot_rt, dev_func),
223 PRIMARY_BUS = offsetof(struct slot_rt, primary_bus), 227 PRIMARY_BUS = offsetof(struct slot_rt, primary_bus),
@@ -286,8 +290,8 @@ struct event_info {
286struct controller { 290struct controller {
287 struct controller *next; 291 struct controller *next;
288 u32 ctrl_int_comp; 292 u32 ctrl_int_comp;
289 struct mutex crit_sect; /* critical section mutex */ 293 struct mutex crit_sect; /* critical section mutex */
290 void __iomem *hpc_reg; /* cookie for our pci controller location */ 294 void __iomem *hpc_reg; /* cookie for our pci controller location */
291 struct pci_resource *mem_head; 295 struct pci_resource *mem_head;
292 struct pci_resource *p_mem_head; 296 struct pci_resource *p_mem_head;
293 struct pci_resource *io_head; 297 struct pci_resource *io_head;
@@ -299,7 +303,7 @@ struct controller {
299 u8 next_event; 303 u8 next_event;
300 u8 interrupt; 304 u8 interrupt;
301 u8 cfgspc_irq; 305 u8 cfgspc_irq;
302 u8 bus; /* bus number for the pci hotplug controller */ 306 u8 bus; /* bus number for the pci hotplug controller */
303 u8 rev; 307 u8 rev;
304 u8 slot_device_offset; 308 u8 slot_device_offset;
305 u8 first_slot; 309 u8 first_slot;
@@ -458,7 +462,6 @@ static inline char *slot_name(struct slot *slot)
458 * return_resource 462 * return_resource
459 * 463 *
460 * Puts node back in the resource list pointed to by head 464 * Puts node back in the resource list pointed to by head
461 *
462 */ 465 */
463static inline void return_resource(struct pci_resource **head, struct pci_resource *node) 466static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
464{ 467{
@@ -575,13 +578,12 @@ static inline u8 read_slot_enable(struct controller *ctrl)
575} 578}
576 579
577 580
578/* 581/**
579 * get_controller_speed - find the current frequency/mode of controller. 582 * get_controller_speed - find the current frequency/mode of controller.
580 * 583 *
581 * @ctrl: controller to get frequency/mode for. 584 * @ctrl: controller to get frequency/mode for.
582 * 585 *
583 * Returns controller speed. 586 * Returns controller speed.
584 *
585 */ 587 */
586static inline u8 get_controller_speed(struct controller *ctrl) 588static inline u8 get_controller_speed(struct controller *ctrl)
587{ 589{
@@ -607,14 +609,13 @@ static inline u8 get_controller_speed(struct controller *ctrl)
607} 609}
608 610
609 611
610/* 612/**
611 * get_adapter_speed - find the max supported frequency/mode of adapter. 613 * get_adapter_speed - find the max supported frequency/mode of adapter.
612 * 614 *
613 * @ctrl: hotplug controller. 615 * @ctrl: hotplug controller.
614 * @hp_slot: hotplug slot where adapter is installed. 616 * @hp_slot: hotplug slot where adapter is installed.
615 * 617 *
616 * Returns adapter speed. 618 * Returns adapter speed.
617 *
618 */ 619 */
619static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot) 620static inline u8 get_adapter_speed(struct controller *ctrl, u8 hp_slot)
620{ 621{
@@ -719,4 +720,3 @@ static inline int wait_for_ctrl_irq(struct controller *ctrl)
719} 720}
720 721
721#endif 722#endif
722
diff --git a/drivers/pci/hotplug/cpqphp_core.c b/drivers/pci/hotplug/cpqphp_core.c
index 55eae4c233c9..91dc95850cce 100644
--- a/drivers/pci/hotplug/cpqphp_core.c
+++ b/drivers/pci/hotplug/cpqphp_core.c
@@ -26,7 +26,6 @@
26 * 26 *
27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support, 27 * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
28 * Torben Mathiasen <torben.mathiasen@hp.com> 28 * Torben Mathiasen <torben.mathiasen@hp.com>
29 *
30 */ 29 */
31 30
32#include <linux/module.h> 31#include <linux/module.h>
@@ -171,7 +170,7 @@ static int init_SERR(struct controller * ctrl)
171 tempdword = ctrl->first_slot; 170 tempdword = ctrl->first_slot;
172 171
173 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 172 number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
174 // Loop through slots 173 /* Loop through slots */
175 while (number_of_slots) { 174 while (number_of_slots) {
176 physical_slot = tempdword; 175 physical_slot = tempdword;
177 writeb(0, ctrl->hpc_reg + SLOT_SERR); 176 writeb(0, ctrl->hpc_reg + SLOT_SERR);
@@ -200,7 +199,7 @@ static int pci_print_IRQ_route (void)
200 199
201 len = (routing_table->size - sizeof(struct irq_routing_table)) / 200 len = (routing_table->size - sizeof(struct irq_routing_table)) /
202 sizeof(struct irq_info); 201 sizeof(struct irq_info);
203 // Make sure I got at least one entry 202 /* Make sure I got at least one entry */
204 if (len == 0) { 203 if (len == 0) {
205 kfree(routing_table); 204 kfree(routing_table);
206 return -1; 205 return -1;
@@ -244,7 +243,7 @@ static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
244 if (!smbios_table || !curr) 243 if (!smbios_table || !curr)
245 return(NULL); 244 return(NULL);
246 245
247 // set p_max to the end of the table 246 /* set p_max to the end of the table */
248 p_max = smbios_start + readw(smbios_table + ST_LENGTH); 247 p_max = smbios_start + readw(smbios_table + ST_LENGTH);
249 248
250 p_temp = curr; 249 p_temp = curr;
@@ -253,7 +252,8 @@ static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
253 while ((p_temp < p_max) && !bail) { 252 while ((p_temp < p_max) && !bail) {
254 /* Look for the double NULL terminator 253 /* Look for the double NULL terminator
255 * The first condition is the previous byte 254 * The first condition is the previous byte
256 * and the second is the curr */ 255 * and the second is the curr
256 */
257 if (!previous_byte && !(readb(p_temp))) { 257 if (!previous_byte && !(readb(p_temp))) {
258 bail = 1; 258 bail = 1;
259 } 259 }
@@ -387,8 +387,9 @@ static int ctrl_slot_setup(struct controller *ctrl,
387 slot->task_event.expires = jiffies + 5 * HZ; 387 slot->task_event.expires = jiffies + 5 * HZ;
388 slot->task_event.function = cpqhp_pushbutton_thread; 388 slot->task_event.function = cpqhp_pushbutton_thread;
389 389
390 //FIXME: these capabilities aren't used but if they are 390 /*FIXME: these capabilities aren't used but if they are
391 // they need to be correctly implemented 391 * they need to be correctly implemented
392 */
392 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED; 393 slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
393 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED; 394 slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
394 395
@@ -402,14 +403,14 @@ static int ctrl_slot_setup(struct controller *ctrl,
402 ctrl_slot = 403 ctrl_slot =
403 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4); 404 slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
404 405
405 // Check presence 406 /* Check presence */
406 slot->capabilities |= 407 slot->capabilities |=
407 ((((~tempdword) >> 23) | 408 ((((~tempdword) >> 23) |
408 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02; 409 ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
409 // Check the switch state 410 /* Check the switch state */
410 slot->capabilities |= 411 slot->capabilities |=
411 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01; 412 ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
412 // Check the slot enable 413 /* Check the slot enable */
413 slot->capabilities |= 414 slot->capabilities |=
414 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04; 415 ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
415 416
@@ -476,11 +477,11 @@ static int ctrl_slot_cleanup (struct controller * ctrl)
476 477
477 cpqhp_remove_debugfs_files(ctrl); 478 cpqhp_remove_debugfs_files(ctrl);
478 479
479 //Free IRQ associated with hot plug device 480 /* Free IRQ associated with hot plug device */
480 free_irq(ctrl->interrupt, ctrl); 481 free_irq(ctrl->interrupt, ctrl);
481 //Unmap the memory 482 /* Unmap the memory */
482 iounmap(ctrl->hpc_reg); 483 iounmap(ctrl->hpc_reg);
483 //Finally reclaim PCI mem 484 /* Finally reclaim PCI mem */
484 release_mem_region(pci_resource_start(ctrl->pci_dev, 0), 485 release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
485 pci_resource_len(ctrl->pci_dev, 0)); 486 pci_resource_len(ctrl->pci_dev, 0));
486 487
@@ -488,20 +489,17 @@ static int ctrl_slot_cleanup (struct controller * ctrl)
488} 489}
489 490
490 491
491//============================================================================ 492/**
492// function: get_slot_mapping 493 * get_slot_mapping - determine logical slot mapping for PCI device
493// 494 *
494// Description: Attempts to determine a logical slot mapping for a PCI 495 * Won't work for more than one PCI-PCI bridge in a slot.
495// device. Won't work for more than one PCI-PCI bridge 496 *
496// in a slot. 497 * @bus_num - bus number of PCI device
497// 498 * @dev_num - device number of PCI device
498// Input: u8 bus_num - bus number of PCI device 499 * @slot - Pointer to u8 where slot number will be returned
499// u8 dev_num - device number of PCI device 500 *
500// u8 *slot - Pointer to u8 where slot number will 501 * Output: SUCCESS or FAILURE
501// be returned 502 */
502//
503// Output: SUCCESS or FAILURE
504//=============================================================================
505static int 503static int
506get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot) 504get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
507{ 505{
@@ -522,7 +520,7 @@ get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
522 520
523 len = (PCIIRQRoutingInfoLength->size - 521 len = (PCIIRQRoutingInfoLength->size -
524 sizeof(struct irq_routing_table)) / sizeof(struct irq_info); 522 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
525 // Make sure I got at least one entry 523 /* Make sure I got at least one entry */
526 if (len == 0) { 524 if (len == 0) {
527 kfree(PCIIRQRoutingInfoLength); 525 kfree(PCIIRQRoutingInfoLength);
528 return -1; 526 return -1;
@@ -539,13 +537,14 @@ get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
539 return 0; 537 return 0;
540 } else { 538 } else {
541 /* Did not get a match on the target PCI device. Check 539 /* Did not get a match on the target PCI device. Check
542 * if the current IRQ table entry is a PCI-to-PCI bridge 540 * if the current IRQ table entry is a PCI-to-PCI
543 * device. If so, and it's secondary bus matches the 541 * bridge device. If so, and it's secondary bus
544 * bus number for the target device, I need to save the 542 * matches the bus number for the target device, I need
545 * bridge's slot number. If I can not find an entry for 543 * to save the bridge's slot number. If I can not find
546 * the target device, I will have to assume it's on the 544 * an entry for the target device, I will have to
547 * other side of the bridge, and assign it the bridge's 545 * assume it's on the other side of the bridge, and
548 * slot. */ 546 * assign it the bridge's slot.
547 */
549 bus->number = tbus; 548 bus->number = tbus;
550 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0), 549 pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
551 PCI_CLASS_REVISION, &work); 550 PCI_CLASS_REVISION, &work);
@@ -563,17 +562,18 @@ get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
563 562
564 } 563 }
565 564
566 // If we got here, we didn't find an entry in the IRQ mapping table 565 /* If we got here, we didn't find an entry in the IRQ mapping table for
567 // for the target PCI device. If we did determine that the target 566 * the target PCI device. If we did determine that the target device
568 // device is on the other side of a PCI-to-PCI bridge, return the 567 * is on the other side of a PCI-to-PCI bridge, return the slot number
569 // slot number for the bridge. 568 * for the bridge.
569 */
570 if (bridgeSlot != 0xFF) { 570 if (bridgeSlot != 0xFF) {
571 *slot = bridgeSlot; 571 *slot = bridgeSlot;
572 kfree(PCIIRQRoutingInfoLength); 572 kfree(PCIIRQRoutingInfoLength);
573 return 0; 573 return 0;
574 } 574 }
575 kfree(PCIIRQRoutingInfoLength); 575 kfree(PCIIRQRoutingInfoLength);
576 // Couldn't find an entry in the routing table for this PCI device 576 /* Couldn't find an entry in the routing table for this PCI device */
577 return -1; 577 return -1;
578} 578}
579 579
@@ -595,7 +595,7 @@ cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
595 595
596 hp_slot = func->device - ctrl->slot_device_offset; 596 hp_slot = func->device - ctrl->slot_device_offset;
597 597
598 // Wait for exclusive access to hardware 598 /* Wait for exclusive access to hardware */
599 mutex_lock(&ctrl->crit_sect); 599 mutex_lock(&ctrl->crit_sect);
600 600
601 if (status == 1) { 601 if (status == 1) {
@@ -603,17 +603,17 @@ cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
603 } else if (status == 0) { 603 } else if (status == 0) {
604 amber_LED_off (ctrl, hp_slot); 604 amber_LED_off (ctrl, hp_slot);
605 } else { 605 } else {
606 // Done with exclusive hardware access 606 /* Done with exclusive hardware access */
607 mutex_unlock(&ctrl->crit_sect); 607 mutex_unlock(&ctrl->crit_sect);
608 return(1); 608 return(1);
609 } 609 }
610 610
611 set_SOGO(ctrl); 611 set_SOGO(ctrl);
612 612
613 // Wait for SOBS to be unset 613 /* Wait for SOBS to be unset */
614 wait_for_ctrl_irq (ctrl); 614 wait_for_ctrl_irq (ctrl);
615 615
616 // Done with exclusive hardware access 616 /* Done with exclusive hardware access */
617 mutex_unlock(&ctrl->crit_sect); 617 mutex_unlock(&ctrl->crit_sect);
618 618
619 return(0); 619 return(0);
@@ -815,7 +815,9 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
815 return err; 815 return err;
816 } 816 }
817 817
818 // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery 818 /* Need to read VID early b/c it's used to differentiate CPQ and INTC
819 * discovery
820 */
819 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id); 821 rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
820 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) { 822 if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
821 err(msg_HPC_non_compaq_or_intel); 823 err(msg_HPC_non_compaq_or_intel);
@@ -837,7 +839,9 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
837 * Also Intel HPC's may have RID=0. 839 * Also Intel HPC's may have RID=0.
838 */ 840 */
839 if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) { 841 if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
840 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs 842 /* TODO: This code can be made to support non-Compaq or Intel
843 * subsystem IDs
844 */
841 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid); 845 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
842 if (rc) { 846 if (rc) {
843 err("%s : pci_read_config_word failed\n", __func__); 847 err("%s : pci_read_config_word failed\n", __func__);
@@ -865,7 +869,9 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
865 869
866 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid); 870 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
867 871
868 /* Set Vendor ID, so it can be accessed later from other functions */ 872 /* Set Vendor ID, so it can be accessed later from other
873 * functions
874 */
869 ctrl->vendor_id = vendor_id; 875 ctrl->vendor_id = vendor_id;
870 876
871 switch (subsystem_vid) { 877 switch (subsystem_vid) {
@@ -992,23 +998,23 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
992 998
993 /* PHP Status (0=De-feature PHP, 1=Normal operation) */ 999 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
994 if (subsystem_deviceid & 0x0008) { 1000 if (subsystem_deviceid & 0x0008) {
995 ctrl->defeature_PHP = 1; // PHP supported 1001 ctrl->defeature_PHP = 1; /* PHP supported */
996 } else { 1002 } else {
997 ctrl->defeature_PHP = 0; // PHP not supported 1003 ctrl->defeature_PHP = 0; /* PHP not supported */
998 } 1004 }
999 1005
1000 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */ 1006 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
1001 if (subsystem_deviceid & 0x0010) { 1007 if (subsystem_deviceid & 0x0010) {
1002 ctrl->alternate_base_address = 1; // supported 1008 ctrl->alternate_base_address = 1; /* supported */
1003 } else { 1009 } else {
1004 ctrl->alternate_base_address = 0; // not supported 1010 ctrl->alternate_base_address = 0; /* not supported */
1005 } 1011 }
1006 1012
1007 /* PCI Config Space Index (0=not supported, 1=supported) */ 1013 /* PCI Config Space Index (0=not supported, 1=supported) */
1008 if (subsystem_deviceid & 0x0020) { 1014 if (subsystem_deviceid & 0x0020) {
1009 ctrl->pci_config_space = 1; // supported 1015 ctrl->pci_config_space = 1; /* supported */
1010 } else { 1016 } else {
1011 ctrl->pci_config_space = 0; // not supported 1017 ctrl->pci_config_space = 0; /* not supported */
1012 } 1018 }
1013 1019
1014 /* PCI-X support */ 1020 /* PCI-X support */
@@ -1042,7 +1048,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1042 return -ENODEV; 1048 return -ENODEV;
1043 } 1049 }
1044 1050
1045 // Tell the user that we found one. 1051 /* Tell the user that we found one. */
1046 info("Initializing the PCI hot plug controller residing on PCI bus %d\n", 1052 info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1047 pdev->bus->number); 1053 pdev->bus->number);
1048 1054
@@ -1120,7 +1126,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1120 * 1126 *
1121 ********************************************************/ 1127 ********************************************************/
1122 1128
1123 // find the physical slot number of the first hot plug slot 1129 /* find the physical slot number of the first hot plug slot */
1124 1130
1125 /* Get slot won't work for devices behind bridges, but 1131 /* Get slot won't work for devices behind bridges, but
1126 * in this case it will always be called for the "base" 1132 * in this case it will always be called for the "base"
@@ -1137,7 +1143,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1137 goto err_iounmap; 1143 goto err_iounmap;
1138 } 1144 }
1139 1145
1140 // Store PCI Config Space for all devices on this bus 1146 /* Store PCI Config Space for all devices on this bus */
1141 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK)); 1147 rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1142 if (rc) { 1148 if (rc) {
1143 err("%s: unable to save PCI configuration data, error %d\n", 1149 err("%s: unable to save PCI configuration data, error %d\n",
@@ -1148,7 +1154,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1148 /* 1154 /*
1149 * Get IO, memory, and IRQ resources for new devices 1155 * Get IO, memory, and IRQ resources for new devices
1150 */ 1156 */
1151 // The next line is required for cpqhp_find_available_resources 1157 /* The next line is required for cpqhp_find_available_resources */
1152 ctrl->interrupt = pdev->irq; 1158 ctrl->interrupt = pdev->irq;
1153 if (ctrl->interrupt < 0x10) { 1159 if (ctrl->interrupt < 0x10) {
1154 cpqhp_legacy_mode = 1; 1160 cpqhp_legacy_mode = 1;
@@ -1196,12 +1202,14 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1196 goto err_iounmap; 1202 goto err_iounmap;
1197 } 1203 }
1198 1204
1199 /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */ 1205 /* Enable Shift Out interrupt and clear it, also enable SERR on power
1206 * fault
1207 */
1200 temp_word = readw(ctrl->hpc_reg + MISC); 1208 temp_word = readw(ctrl->hpc_reg + MISC);
1201 temp_word |= 0x4006; 1209 temp_word |= 0x4006;
1202 writew(temp_word, ctrl->hpc_reg + MISC); 1210 writew(temp_word, ctrl->hpc_reg + MISC);
1203 1211
1204 // Changed 05/05/97 to clear all interrupts at start 1212 /* Changed 05/05/97 to clear all interrupts at start */
1205 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR); 1213 writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1206 1214
1207 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR); 1215 ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
@@ -1216,13 +1224,14 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1216 cpqhp_ctrl_list = ctrl; 1224 cpqhp_ctrl_list = ctrl;
1217 } 1225 }
1218 1226
1219 // turn off empty slots here unless command line option "ON" set 1227 /* turn off empty slots here unless command line option "ON" set
1220 // Wait for exclusive access to hardware 1228 * Wait for exclusive access to hardware
1229 */
1221 mutex_lock(&ctrl->crit_sect); 1230 mutex_lock(&ctrl->crit_sect);
1222 1231
1223 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F; 1232 num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1224 1233
1225 // find first device number for the ctrl 1234 /* find first device number for the ctrl */
1226 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4; 1235 device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1227 1236
1228 while (num_of_slots) { 1237 while (num_of_slots) {
@@ -1234,7 +1243,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1234 hp_slot = func->device - ctrl->slot_device_offset; 1243 hp_slot = func->device - ctrl->slot_device_offset;
1235 dbg("hp_slot: %d\n", hp_slot); 1244 dbg("hp_slot: %d\n", hp_slot);
1236 1245
1237 // We have to save the presence info for these slots 1246 /* We have to save the presence info for these slots */
1238 temp_word = ctrl->ctrl_int_comp >> 16; 1247 temp_word = ctrl->ctrl_int_comp >> 16;
1239 func->presence_save = (temp_word >> hp_slot) & 0x01; 1248 func->presence_save = (temp_word >> hp_slot) & 0x01;
1240 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; 1249 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
@@ -1258,7 +1267,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1258 1267
1259 if (!power_mode) { 1268 if (!power_mode) {
1260 set_SOGO(ctrl); 1269 set_SOGO(ctrl);
1261 // Wait for SOBS to be unset 1270 /* Wait for SOBS to be unset */
1262 wait_for_ctrl_irq(ctrl); 1271 wait_for_ctrl_irq(ctrl);
1263 } 1272 }
1264 1273
@@ -1269,7 +1278,7 @@ static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1269 goto err_free_irq; 1278 goto err_free_irq;
1270 } 1279 }
1271 1280
1272 // Done with exclusive hardware access 1281 /* Done with exclusive hardware access */
1273 mutex_unlock(&ctrl->crit_sect); 1282 mutex_unlock(&ctrl->crit_sect);
1274 1283
1275 cpqhp_create_debugfs_files(ctrl); 1284 cpqhp_create_debugfs_files(ctrl);
@@ -1316,11 +1325,11 @@ static int one_time_init(void)
1316 cpqhp_slot_list[loop] = NULL; 1325 cpqhp_slot_list[loop] = NULL;
1317 } 1326 }
1318 1327
1319 // FIXME: We also need to hook the NMI handler eventually. 1328 /* FIXME: We also need to hook the NMI handler eventually.
1320 // this also needs to be worked with Christoph 1329 * this also needs to be worked with Christoph
1321 // register_NMI_handler(); 1330 * register_NMI_handler();
1322 1331 */
1323 // Map rom address 1332 /* Map rom address */
1324 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN); 1333 cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1325 if (!cpqhp_rom_start) { 1334 if (!cpqhp_rom_start) {
1326 err ("Could not ioremap memory region for ROM\n"); 1335 err ("Could not ioremap memory region for ROM\n");
@@ -1328,7 +1337,9 @@ static int one_time_init(void)
1328 goto error; 1337 goto error;
1329 } 1338 }
1330 1339
1331 /* Now, map the int15 entry point if we are on compaq specific hardware */ 1340 /* Now, map the int15 entry point if we are on compaq specific
1341 * hardware
1342 */
1332 compaq_nvram_init(cpqhp_rom_start); 1343 compaq_nvram_init(cpqhp_rom_start);
1333 1344
1334 /* Map smbios table entry point structure */ 1345 /* Map smbios table entry point structure */
@@ -1462,11 +1473,11 @@ static void __exit unload_cpqphpd(void)
1462 } 1473 }
1463 } 1474 }
1464 1475
1465 // Stop the notification mechanism 1476 /* Stop the notification mechanism */
1466 if (initialized) 1477 if (initialized)
1467 cpqhp_event_stop_thread(); 1478 cpqhp_event_stop_thread();
1468 1479
1469 //unmap the rom address 1480 /* unmap the rom address */
1470 if (cpqhp_rom_start) 1481 if (cpqhp_rom_start)
1471 iounmap(cpqhp_rom_start); 1482 iounmap(cpqhp_rom_start);
1472 if (smbios_start) 1483 if (smbios_start)
diff --git a/drivers/pci/hotplug/cpqphp_ctrl.c b/drivers/pci/hotplug/cpqphp_ctrl.c
index ec3a76519af2..b02b8dddcf9f 100644
--- a/drivers/pci/hotplug/cpqphp_ctrl.c
+++ b/drivers/pci/hotplug/cpqphp_ctrl.c
@@ -81,14 +81,15 @@ static u8 handle_switch_change(u8 change, struct controller * ctrl)
81 81
82 for (hp_slot = 0; hp_slot < 6; hp_slot++) { 82 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
83 if (change & (0x1L << hp_slot)) { 83 if (change & (0x1L << hp_slot)) {
84 /********************************** 84 /*
85 * this one changed. 85 * this one changed.
86 **********************************/ 86 */
87 func = cpqhp_slot_find(ctrl->bus, 87 func = cpqhp_slot_find(ctrl->bus,
88 (hp_slot + ctrl->slot_device_offset), 0); 88 (hp_slot + ctrl->slot_device_offset), 0);
89 89
90 /* this is the structure that tells the worker thread 90 /* this is the structure that tells the worker thread
91 *what to do */ 91 * what to do
92 */
92 taskInfo = &(ctrl->event_queue[ctrl->next_event]); 93 taskInfo = &(ctrl->event_queue[ctrl->next_event]);
93 ctrl->next_event = (ctrl->next_event + 1) % 10; 94 ctrl->next_event = (ctrl->next_event + 1) % 10;
94 taskInfo->hp_slot = hp_slot; 95 taskInfo->hp_slot = hp_slot;
@@ -100,17 +101,17 @@ static u8 handle_switch_change(u8 change, struct controller * ctrl)
100 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; 101 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
101 102
102 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) { 103 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
103 /********************************** 104 /*
104 * Switch opened 105 * Switch opened
105 **********************************/ 106 */
106 107
107 func->switch_save = 0; 108 func->switch_save = 0;
108 109
109 taskInfo->event_type = INT_SWITCH_OPEN; 110 taskInfo->event_type = INT_SWITCH_OPEN;
110 } else { 111 } else {
111 /********************************** 112 /*
112 * Switch closed 113 * Switch closed
113 **********************************/ 114 */
114 115
115 func->switch_save = 0x10; 116 func->switch_save = 0x10;
116 117
@@ -152,17 +153,17 @@ static u8 handle_presence_change(u16 change, struct controller * ctrl)
152 if (!change) 153 if (!change)
153 return 0; 154 return 0;
154 155
155 /********************************** 156 /*
156 * Presence Change 157 * Presence Change
157 **********************************/ 158 */
158 dbg("cpqsbd: Presence/Notify input change.\n"); 159 dbg("cpqsbd: Presence/Notify input change.\n");
159 dbg(" Changed bits are 0x%4.4x\n", change ); 160 dbg(" Changed bits are 0x%4.4x\n", change );
160 161
161 for (hp_slot = 0; hp_slot < 6; hp_slot++) { 162 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
162 if (change & (0x0101 << hp_slot)) { 163 if (change & (0x0101 << hp_slot)) {
163 /********************************** 164 /*
164 * this one changed. 165 * this one changed.
165 **********************************/ 166 */
166 func = cpqhp_slot_find(ctrl->bus, 167 func = cpqhp_slot_find(ctrl->bus,
167 (hp_slot + ctrl->slot_device_offset), 0); 168 (hp_slot + ctrl->slot_device_offset), 0);
168 169
@@ -177,22 +178,23 @@ static u8 handle_presence_change(u16 change, struct controller * ctrl)
177 return 0; 178 return 0;
178 179
179 /* If the switch closed, must be a button 180 /* If the switch closed, must be a button
180 * If not in button mode, nevermind */ 181 * If not in button mode, nevermind
182 */
181 if (func->switch_save && (ctrl->push_button == 1)) { 183 if (func->switch_save && (ctrl->push_button == 1)) {
182 temp_word = ctrl->ctrl_int_comp >> 16; 184 temp_word = ctrl->ctrl_int_comp >> 16;
183 temp_byte = (temp_word >> hp_slot) & 0x01; 185 temp_byte = (temp_word >> hp_slot) & 0x01;
184 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02; 186 temp_byte |= (temp_word >> (hp_slot + 7)) & 0x02;
185 187
186 if (temp_byte != func->presence_save) { 188 if (temp_byte != func->presence_save) {
187 /************************************** 189 /*
188 * button Pressed (doesn't do anything) 190 * button Pressed (doesn't do anything)
189 **************************************/ 191 */
190 dbg("hp_slot %d button pressed\n", hp_slot); 192 dbg("hp_slot %d button pressed\n", hp_slot);
191 taskInfo->event_type = INT_BUTTON_PRESS; 193 taskInfo->event_type = INT_BUTTON_PRESS;
192 } else { 194 } else {
193 /********************************** 195 /*
194 * button Released - TAKE ACTION!!!! 196 * button Released - TAKE ACTION!!!!
195 **********************************/ 197 */
196 dbg("hp_slot %d button released\n", hp_slot); 198 dbg("hp_slot %d button released\n", hp_slot);
197 taskInfo->event_type = INT_BUTTON_RELEASE; 199 taskInfo->event_type = INT_BUTTON_RELEASE;
198 200
@@ -210,7 +212,8 @@ static u8 handle_presence_change(u16 change, struct controller * ctrl)
210 } 212 }
211 } else { 213 } else {
212 /* Switch is open, assume a presence change 214 /* Switch is open, assume a presence change
213 * Save the presence state */ 215 * Save the presence state
216 */
214 temp_word = ctrl->ctrl_int_comp >> 16; 217 temp_word = ctrl->ctrl_int_comp >> 16;
215 func->presence_save = (temp_word >> hp_slot) & 0x01; 218 func->presence_save = (temp_word >> hp_slot) & 0x01;
216 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02; 219 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
@@ -241,17 +244,17 @@ static u8 handle_power_fault(u8 change, struct controller * ctrl)
241 if (!change) 244 if (!change)
242 return 0; 245 return 0;
243 246
244 /********************************** 247 /*
245 * power fault 248 * power fault
246 **********************************/ 249 */
247 250
248 info("power fault interrupt\n"); 251 info("power fault interrupt\n");
249 252
250 for (hp_slot = 0; hp_slot < 6; hp_slot++) { 253 for (hp_slot = 0; hp_slot < 6; hp_slot++) {
251 if (change & (0x01 << hp_slot)) { 254 if (change & (0x01 << hp_slot)) {
252 /********************************** 255 /*
253 * this one changed. 256 * this one changed.
254 **********************************/ 257 */
255 func = cpqhp_slot_find(ctrl->bus, 258 func = cpqhp_slot_find(ctrl->bus,
256 (hp_slot + ctrl->slot_device_offset), 0); 259 (hp_slot + ctrl->slot_device_offset), 0);
257 260
@@ -262,16 +265,16 @@ static u8 handle_power_fault(u8 change, struct controller * ctrl)
262 rc++; 265 rc++;
263 266
264 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) { 267 if (ctrl->ctrl_int_comp & (0x00000100 << hp_slot)) {
265 /********************************** 268 /*
266 * power fault Cleared 269 * power fault Cleared
267 **********************************/ 270 */
268 func->status = 0x00; 271 func->status = 0x00;
269 272
270 taskInfo->event_type = INT_POWER_FAULT_CLEAR; 273 taskInfo->event_type = INT_POWER_FAULT_CLEAR;
271 } else { 274 } else {
272 /********************************** 275 /*
273 * power fault 276 * power fault
274 **********************************/ 277 */
275 taskInfo->event_type = INT_POWER_FAULT; 278 taskInfo->event_type = INT_POWER_FAULT;
276 279
277 if (ctrl->rev < 4) { 280 if (ctrl->rev < 4) {
@@ -432,13 +435,15 @@ static struct pci_resource *do_pre_bridge_resource_split(struct pci_resource **h
432 435
433 436
434 /* If we got here, there the bridge requires some of the resource, but 437 /* If we got here, there the bridge requires some of the resource, but
435 * we may be able to split some off of the front */ 438 * we may be able to split some off of the front
439 */
436 440
437 node = *head; 441 node = *head;
438 442
439 if (node->length & (alignment -1)) { 443 if (node->length & (alignment -1)) {
440 /* this one isn't an aligned length, so we'll make a new entry 444 /* this one isn't an aligned length, so we'll make a new entry
441 * and split it up. */ 445 * and split it up.
446 */
442 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL); 447 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
443 448
444 if (!split_node) 449 if (!split_node)
@@ -556,7 +561,8 @@ static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size
556 561
557 if (node->base & (size - 1)) { 562 if (node->base & (size - 1)) {
558 /* this one isn't base aligned properly 563 /* this one isn't base aligned properly
559 * so we'll make a new entry and split it up */ 564 * so we'll make a new entry and split it up
565 */
560 temp_dword = (node->base | (size-1)) + 1; 566 temp_dword = (node->base | (size-1)) + 1;
561 567
562 /* Short circuit if adjusted size is too small */ 568 /* Short circuit if adjusted size is too small */
@@ -581,7 +587,8 @@ static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size
581 /* Don't need to check if too small since we already did */ 587 /* Don't need to check if too small since we already did */
582 if (node->length > size) { 588 if (node->length > size) {
583 /* this one is longer than we need 589 /* this one is longer than we need
584 * so we'll make a new entry and split it up */ 590 * so we'll make a new entry and split it up
591 */
585 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL); 592 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
586 593
587 if (!split_node) 594 if (!split_node)
@@ -601,7 +608,8 @@ static struct pci_resource *get_io_resource(struct pci_resource **head, u32 size
601 continue; 608 continue;
602 609
603 /* If we got here, then it is the right size 610 /* If we got here, then it is the right size
604 * Now take it out of the list and break */ 611 * Now take it out of the list and break
612 */
605 if (*head == node) { 613 if (*head == node) {
606 *head = node->next; 614 *head = node->next;
607 } else { 615 } else {
@@ -643,13 +651,15 @@ static struct pci_resource *get_max_resource(struct pci_resource **head, u32 siz
643 651
644 for (max = *head; max; max = max->next) { 652 for (max = *head; max; max = max->next) {
645 /* If not big enough we could probably just bail, 653 /* If not big enough we could probably just bail,
646 * instead we'll continue to the next. */ 654 * instead we'll continue to the next.
655 */
647 if (max->length < size) 656 if (max->length < size)
648 continue; 657 continue;
649 658
650 if (max->base & (size - 1)) { 659 if (max->base & (size - 1)) {
651 /* this one isn't base aligned properly 660 /* this one isn't base aligned properly
652 * so we'll make a new entry and split it up */ 661 * so we'll make a new entry and split it up
662 */
653 temp_dword = (max->base | (size-1)) + 1; 663 temp_dword = (max->base | (size-1)) + 1;
654 664
655 /* Short circuit if adjusted size is too small */ 665 /* Short circuit if adjusted size is too small */
@@ -672,7 +682,8 @@ static struct pci_resource *get_max_resource(struct pci_resource **head, u32 siz
672 682
673 if ((max->base + max->length) & (size - 1)) { 683 if ((max->base + max->length) & (size - 1)) {
674 /* this one isn't end aligned properly at the top 684 /* this one isn't end aligned properly at the top
675 * so we'll make a new entry and split it up */ 685 * so we'll make a new entry and split it up
686 */
676 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL); 687 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
677 688
678 if (!split_node) 689 if (!split_node)
@@ -744,7 +755,8 @@ static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
744 if (node->base & (size - 1)) { 755 if (node->base & (size - 1)) {
745 dbg("%s: not aligned\n", __func__); 756 dbg("%s: not aligned\n", __func__);
746 /* this one isn't base aligned properly 757 /* this one isn't base aligned properly
747 * so we'll make a new entry and split it up */ 758 * so we'll make a new entry and split it up
759 */
748 temp_dword = (node->base | (size-1)) + 1; 760 temp_dword = (node->base | (size-1)) + 1;
749 761
750 /* Short circuit if adjusted size is too small */ 762 /* Short circuit if adjusted size is too small */
@@ -769,7 +781,8 @@ static struct pci_resource *get_resource(struct pci_resource **head, u32 size)
769 if (node->length > size) { 781 if (node->length > size) {
770 dbg("%s: too big\n", __func__); 782 dbg("%s: too big\n", __func__);
771 /* this one is longer than we need 783 /* this one is longer than we need
772 * so we'll make a new entry and split it up */ 784 * so we'll make a new entry and split it up
785 */
773 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL); 786 split_node = kmalloc(sizeof(*split_node), GFP_KERNEL);
774 787
775 if (!split_node) 788 if (!split_node)
@@ -888,17 +901,17 @@ irqreturn_t cpqhp_ctrl_intr(int IRQ, void *data)
888 901
889 902
890 misc = readw(ctrl->hpc_reg + MISC); 903 misc = readw(ctrl->hpc_reg + MISC);
891 /*************************************** 904 /*
892 * Check to see if it was our interrupt 905 * Check to see if it was our interrupt
893 ***************************************/ 906 */
894 if (!(misc & 0x000C)) { 907 if (!(misc & 0x000C)) {
895 return IRQ_NONE; 908 return IRQ_NONE;
896 } 909 }
897 910
898 if (misc & 0x0004) { 911 if (misc & 0x0004) {
899 /********************************** 912 /*
900 * Serial Output interrupt Pending 913 * Serial Output interrupt Pending
901 **********************************/ 914 */
902 915
903 /* Clear the interrupt */ 916 /* Clear the interrupt */
904 misc |= 0x0004; 917 misc |= 0x0004;
@@ -963,7 +976,8 @@ struct pci_func *cpqhp_slot_create(u8 busnumber)
963 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL); 976 new_slot = kzalloc(sizeof(*new_slot), GFP_KERNEL);
964 if (new_slot == NULL) { 977 if (new_slot == NULL) {
965 /* I'm not dead yet! 978 /* I'm not dead yet!
966 * You will be. */ 979 * You will be.
980 */
967 return new_slot; 981 return new_slot;
968 } 982 }
969 983
@@ -1135,7 +1149,8 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
1135 return 0; 1149 return 0;
1136 1150
1137 /* We don't allow freq/mode changes if we find another adapter running 1151 /* We don't allow freq/mode changes if we find another adapter running
1138 * in another slot on this controller */ 1152 * in another slot on this controller
1153 */
1139 for(slot = ctrl->slot; slot; slot = slot->next) { 1154 for(slot = ctrl->slot; slot; slot = slot->next) {
1140 if (slot->device == (hp_slot + ctrl->slot_device_offset)) 1155 if (slot->device == (hp_slot + ctrl->slot_device_offset))
1141 continue; 1156 continue;
@@ -1145,7 +1160,8 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
1145 continue; 1160 continue;
1146 /* If another adapter is running on the same segment but at a 1161 /* If another adapter is running on the same segment but at a
1147 * lower speed/mode, we allow the new adapter to function at 1162 * lower speed/mode, we allow the new adapter to function at
1148 * this rate if supported */ 1163 * this rate if supported
1164 */
1149 if (ctrl->speed < adapter_speed) 1165 if (ctrl->speed < adapter_speed)
1150 return 0; 1166 return 0;
1151 1167
@@ -1153,7 +1169,8 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
1153 } 1169 }
1154 1170
1155 /* If the controller doesn't support freq/mode changes and the 1171 /* If the controller doesn't support freq/mode changes and the
1156 * controller is running at a higher mode, we bail */ 1172 * controller is running at a higher mode, we bail
1173 */
1157 if ((ctrl->speed > adapter_speed) && (!ctrl->pcix_speed_capability)) 1174 if ((ctrl->speed > adapter_speed) && (!ctrl->pcix_speed_capability))
1158 return 1; 1175 return 1;
1159 1176
@@ -1162,7 +1179,8 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
1162 return 0; 1179 return 0;
1163 1180
1164 /* We try to set the max speed supported by both the adapter and 1181 /* We try to set the max speed supported by both the adapter and
1165 * controller */ 1182 * controller
1183 */
1166 if (ctrl->speed_capability < adapter_speed) { 1184 if (ctrl->speed_capability < adapter_speed) {
1167 if (ctrl->speed == ctrl->speed_capability) 1185 if (ctrl->speed == ctrl->speed_capability)
1168 return 0; 1186 return 0;
@@ -1244,7 +1262,7 @@ static u8 set_controller_speed(struct controller *ctrl, u8 adapter_speed, u8 hp_
1244} 1262}
1245 1263
1246/* the following routines constitute the bulk of the 1264/* the following routines constitute the bulk of the
1247 hotplug controller logic 1265 * hotplug controller logic
1248 */ 1266 */
1249 1267
1250 1268
@@ -1269,14 +1287,14 @@ static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1269 hp_slot = func->device - ctrl->slot_device_offset; 1287 hp_slot = func->device - ctrl->slot_device_offset;
1270 1288
1271 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot)) { 1289 if (readl(ctrl->hpc_reg + INT_INPUT_CLEAR) & (0x01L << hp_slot)) {
1272 /********************************** 1290 /*
1273 * The switch is open. 1291 * The switch is open.
1274 **********************************/ 1292 */
1275 rc = INTERLOCK_OPEN; 1293 rc = INTERLOCK_OPEN;
1276 } else if (is_slot_enabled (ctrl, hp_slot)) { 1294 } else if (is_slot_enabled (ctrl, hp_slot)) {
1277 /********************************** 1295 /*
1278 * The board is already on 1296 * The board is already on
1279 **********************************/ 1297 */
1280 rc = CARD_FUNCTIONING; 1298 rc = CARD_FUNCTIONING;
1281 } else { 1299 } else {
1282 mutex_lock(&ctrl->crit_sect); 1300 mutex_lock(&ctrl->crit_sect);
@@ -1352,7 +1370,8 @@ static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1352 * Get slot won't work for devices behind 1370 * Get slot won't work for devices behind
1353 * bridges, but in this case it will always be 1371 * bridges, but in this case it will always be
1354 * called for the "base" bus/dev/func of an 1372 * called for the "base" bus/dev/func of an
1355 * adapter. */ 1373 * adapter.
1374 */
1356 1375
1357 mutex_lock(&ctrl->crit_sect); 1376 mutex_lock(&ctrl->crit_sect);
1358 1377
@@ -1377,7 +1396,8 @@ static u32 board_replaced(struct pci_func *func, struct controller *ctrl)
1377 1396
1378 * Get slot won't work for devices behind bridges, but 1397 * Get slot won't work for devices behind bridges, but
1379 * in this case it will always be called for the "base" 1398 * in this case it will always be called for the "base"
1380 * bus/dev/func of an adapter. */ 1399 * bus/dev/func of an adapter.
1400 */
1381 1401
1382 mutex_lock(&ctrl->crit_sect); 1402 mutex_lock(&ctrl->crit_sect);
1383 1403
@@ -1434,7 +1454,8 @@ static u32 board_added(struct pci_func *func, struct controller *ctrl)
1434 wait_for_ctrl_irq (ctrl); 1454 wait_for_ctrl_irq (ctrl);
1435 1455
1436 /* Change bits in slot power register to force another shift out 1456 /* Change bits in slot power register to force another shift out
1437 * NOTE: this is to work around the timer bug */ 1457 * NOTE: this is to work around the timer bug
1458 */
1438 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER); 1459 temp_byte = readb(ctrl->hpc_reg + SLOT_POWER);
1439 writeb(0x00, ctrl->hpc_reg + SLOT_POWER); 1460 writeb(0x00, ctrl->hpc_reg + SLOT_POWER);
1440 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER); 1461 writeb(temp_byte, ctrl->hpc_reg + SLOT_POWER);
@@ -2484,7 +2505,8 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
2484 temp_resources.irqs = &irqs; 2505 temp_resources.irqs = &irqs;
2485 2506
2486 /* Make copies of the nodes we are going to pass down so that 2507 /* Make copies of the nodes we are going to pass down so that
2487 * if there is a problem,we can just use these to free resources */ 2508 * if there is a problem,we can just use these to free resources
2509 */
2488 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL); 2510 hold_bus_node = kmalloc(sizeof(*hold_bus_node), GFP_KERNEL);
2489 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL); 2511 hold_IO_node = kmalloc(sizeof(*hold_IO_node), GFP_KERNEL);
2490 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL); 2512 hold_mem_node = kmalloc(sizeof(*hold_mem_node), GFP_KERNEL);
@@ -2556,7 +2578,8 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
2556 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16; 2578 temp_word = (p_mem_node->base + p_mem_node->length - 1) >> 16;
2557 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word); 2579 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word);
2558 2580
2559 /* Adjust this to compensate for extra adjustment in first loop */ 2581 /* Adjust this to compensate for extra adjustment in first loop
2582 */
2560 irqs.barber_pole--; 2583 irqs.barber_pole--;
2561 2584
2562 rc = 0; 2585 rc = 0;
diff --git a/drivers/pci/hotplug/cpqphp_nvram.c b/drivers/pci/hotplug/cpqphp_nvram.c
index 76e110f0e3a6..76ba8a1c774d 100644
--- a/drivers/pci/hotplug/cpqphp_nvram.c
+++ b/drivers/pci/hotplug/cpqphp_nvram.c
@@ -94,12 +94,13 @@ static u8 evbuffer[1024];
94 94
95static void __iomem *compaq_int15_entry_point; 95static void __iomem *compaq_int15_entry_point;
96 96
97static spinlock_t int15_lock; /* lock for ordering int15_bios_call() */ 97/* lock for ordering int15_bios_call() */
98static spinlock_t int15_lock;
98 99
99 100
100/* This is a series of function that deals with 101/* This is a series of function that deals with
101 setting & getting the hotplug resource table in some environment variable. 102 * setting & getting the hotplug resource table in some environment variable.
102*/ 103 */
103 104
104/* 105/*
105 * We really shouldn't be doing this unless there is a _very_ good reason to!!! 106 * We really shouldn't be doing this unless there is a _very_ good reason to!!!
@@ -210,14 +211,16 @@ static int load_HRT (void __iomem *rom_start)
210 211
211 available = 1024; 212 available = 1024;
212 213
213 // Now load the EV 214 /* Now load the EV */
214 temp_dword = available; 215 temp_dword = available;
215 216
216 rc = access_EV(READ_EV, "CQTHPS", evbuffer, &temp_dword); 217 rc = access_EV(READ_EV, "CQTHPS", evbuffer, &temp_dword);
217 218
218 evbuffer_length = temp_dword; 219 evbuffer_length = temp_dword;
219 220
220 // We're maintaining the resource lists so write FF to invalidate old info 221 /* We're maintaining the resource lists so write FF to invalidate old
222 * info
223 */
221 temp_dword = 1; 224 temp_dword = 1;
222 225
223 rc = access_EV(WRITE_EV, "CQTHPS", &temp_byte, &temp_dword); 226 rc = access_EV(WRITE_EV, "CQTHPS", &temp_byte, &temp_dword);
@@ -264,12 +267,12 @@ static u32 store_HRT (void __iomem *rom_start)
264 267
265 ctrl = cpqhp_ctrl_list; 268 ctrl = cpqhp_ctrl_list;
266 269
267 // The revision of this structure 270 /* The revision of this structure */
268 rc = add_byte( &pFill, 1 + ctrl->push_flag, &usedbytes, &available); 271 rc = add_byte( &pFill, 1 + ctrl->push_flag, &usedbytes, &available);
269 if (rc) 272 if (rc)
270 return(rc); 273 return(rc);
271 274
272 // The number of controllers 275 /* The number of controllers */
273 rc = add_byte( &pFill, 1, &usedbytes, &available); 276 rc = add_byte( &pFill, 1, &usedbytes, &available);
274 if (rc) 277 if (rc)
275 return(rc); 278 return(rc);
@@ -279,27 +282,27 @@ static u32 store_HRT (void __iomem *rom_start)
279 282
280 numCtrl++; 283 numCtrl++;
281 284
282 // The bus number 285 /* The bus number */
283 rc = add_byte( &pFill, ctrl->bus, &usedbytes, &available); 286 rc = add_byte( &pFill, ctrl->bus, &usedbytes, &available);
284 if (rc) 287 if (rc)
285 return(rc); 288 return(rc);
286 289
287 // The device Number 290 /* The device Number */
288 rc = add_byte( &pFill, PCI_SLOT(ctrl->pci_dev->devfn), &usedbytes, &available); 291 rc = add_byte( &pFill, PCI_SLOT(ctrl->pci_dev->devfn), &usedbytes, &available);
289 if (rc) 292 if (rc)
290 return(rc); 293 return(rc);
291 294
292 // The function Number 295 /* The function Number */
293 rc = add_byte( &pFill, PCI_FUNC(ctrl->pci_dev->devfn), &usedbytes, &available); 296 rc = add_byte( &pFill, PCI_FUNC(ctrl->pci_dev->devfn), &usedbytes, &available);
294 if (rc) 297 if (rc)
295 return(rc); 298 return(rc);
296 299
297 // Skip the number of available entries 300 /* Skip the number of available entries */
298 rc = add_dword( &pFill, 0, &usedbytes, &available); 301 rc = add_dword( &pFill, 0, &usedbytes, &available);
299 if (rc) 302 if (rc)
300 return(rc); 303 return(rc);
301 304
302 // Figure out memory Available 305 /* Figure out memory Available */
303 306
304 resNode = ctrl->mem_head; 307 resNode = ctrl->mem_head;
305 308
@@ -308,12 +311,12 @@ static u32 store_HRT (void __iomem *rom_start)
308 while (resNode) { 311 while (resNode) {
309 loop ++; 312 loop ++;
310 313
311 // base 314 /* base */
312 rc = add_dword( &pFill, resNode->base, &usedbytes, &available); 315 rc = add_dword( &pFill, resNode->base, &usedbytes, &available);
313 if (rc) 316 if (rc)
314 return(rc); 317 return(rc);
315 318
316 // length 319 /* length */
317 rc = add_dword( &pFill, resNode->length, &usedbytes, &available); 320 rc = add_dword( &pFill, resNode->length, &usedbytes, &available);
318 if (rc) 321 if (rc)
319 return(rc); 322 return(rc);
@@ -321,10 +324,10 @@ static u32 store_HRT (void __iomem *rom_start)
321 resNode = resNode->next; 324 resNode = resNode->next;
322 } 325 }
323 326
324 // Fill in the number of entries 327 /* Fill in the number of entries */
325 p_ev_ctrl->mem_avail = loop; 328 p_ev_ctrl->mem_avail = loop;
326 329
327 // Figure out prefetchable memory Available 330 /* Figure out prefetchable memory Available */
328 331
329 resNode = ctrl->p_mem_head; 332 resNode = ctrl->p_mem_head;
330 333
@@ -333,12 +336,12 @@ static u32 store_HRT (void __iomem *rom_start)
333 while (resNode) { 336 while (resNode) {
334 loop ++; 337 loop ++;
335 338
336 // base 339 /* base */
337 rc = add_dword( &pFill, resNode->base, &usedbytes, &available); 340 rc = add_dword( &pFill, resNode->base, &usedbytes, &available);
338 if (rc) 341 if (rc)
339 return(rc); 342 return(rc);
340 343
341 // length 344 /* length */
342 rc = add_dword( &pFill, resNode->length, &usedbytes, &available); 345 rc = add_dword( &pFill, resNode->length, &usedbytes, &available);
343 if (rc) 346 if (rc)
344 return(rc); 347 return(rc);
@@ -346,10 +349,10 @@ static u32 store_HRT (void __iomem *rom_start)
346 resNode = resNode->next; 349 resNode = resNode->next;
347 } 350 }
348 351
349 // Fill in the number of entries 352 /* Fill in the number of entries */
350 p_ev_ctrl->p_mem_avail = loop; 353 p_ev_ctrl->p_mem_avail = loop;
351 354
352 // Figure out IO Available 355 /* Figure out IO Available */
353 356
354 resNode = ctrl->io_head; 357 resNode = ctrl->io_head;
355 358
@@ -358,12 +361,12 @@ static u32 store_HRT (void __iomem *rom_start)
358 while (resNode) { 361 while (resNode) {
359 loop ++; 362 loop ++;
360 363
361 // base 364 /* base */
362 rc = add_dword( &pFill, resNode->base, &usedbytes, &available); 365 rc = add_dword( &pFill, resNode->base, &usedbytes, &available);
363 if (rc) 366 if (rc)
364 return(rc); 367 return(rc);
365 368
366 // length 369 /* length */
367 rc = add_dword( &pFill, resNode->length, &usedbytes, &available); 370 rc = add_dword( &pFill, resNode->length, &usedbytes, &available);
368 if (rc) 371 if (rc)
369 return(rc); 372 return(rc);
@@ -371,10 +374,10 @@ static u32 store_HRT (void __iomem *rom_start)
371 resNode = resNode->next; 374 resNode = resNode->next;
372 } 375 }
373 376
374 // Fill in the number of entries 377 /* Fill in the number of entries */
375 p_ev_ctrl->io_avail = loop; 378 p_ev_ctrl->io_avail = loop;
376 379
377 // Figure out bus Available 380 /* Figure out bus Available */
378 381
379 resNode = ctrl->bus_head; 382 resNode = ctrl->bus_head;
380 383
@@ -383,12 +386,12 @@ static u32 store_HRT (void __iomem *rom_start)
383 while (resNode) { 386 while (resNode) {
384 loop ++; 387 loop ++;
385 388
386 // base 389 /* base */
387 rc = add_dword( &pFill, resNode->base, &usedbytes, &available); 390 rc = add_dword( &pFill, resNode->base, &usedbytes, &available);
388 if (rc) 391 if (rc)
389 return(rc); 392 return(rc);
390 393
391 // length 394 /* length */
392 rc = add_dword( &pFill, resNode->length, &usedbytes, &available); 395 rc = add_dword( &pFill, resNode->length, &usedbytes, &available);
393 if (rc) 396 if (rc)
394 return(rc); 397 return(rc);
@@ -396,7 +399,7 @@ static u32 store_HRT (void __iomem *rom_start)
396 resNode = resNode->next; 399 resNode = resNode->next;
397 } 400 }
398 401
399 // Fill in the number of entries 402 /* Fill in the number of entries */
400 p_ev_ctrl->bus_avail = loop; 403 p_ev_ctrl->bus_avail = loop;
401 404
402 ctrl = ctrl->next; 405 ctrl = ctrl->next;
@@ -404,7 +407,7 @@ static u32 store_HRT (void __iomem *rom_start)
404 407
405 p_EV_header->num_of_ctrl = numCtrl; 408 p_EV_header->num_of_ctrl = numCtrl;
406 409
407 // Now store the EV 410 /* Now store the EV */
408 411
409 temp_dword = usedbytes; 412 temp_dword = usedbytes;
410 413
@@ -449,20 +452,21 @@ int compaq_nvram_load (void __iomem *rom_start, struct controller *ctrl)
449 struct ev_hrt_header *p_EV_header; 452 struct ev_hrt_header *p_EV_header;
450 453
451 if (!evbuffer_init) { 454 if (!evbuffer_init) {
452 // Read the resource list information in from NVRAM 455 /* Read the resource list information in from NVRAM */
453 if (load_HRT(rom_start)) 456 if (load_HRT(rom_start))
454 memset (evbuffer, 0, 1024); 457 memset (evbuffer, 0, 1024);
455 458
456 evbuffer_init = 1; 459 evbuffer_init = 1;
457 } 460 }
458 461
459 // If we saved information in NVRAM, use it now 462 /* If we saved information in NVRAM, use it now */
460 p_EV_header = (struct ev_hrt_header *) evbuffer; 463 p_EV_header = (struct ev_hrt_header *) evbuffer;
461 464
462 // The following code is for systems where version 1.0 of this 465 /* The following code is for systems where version 1.0 of this
463 // driver has been loaded, but doesn't support the hardware. 466 * driver has been loaded, but doesn't support the hardware.
464 // In that case, the driver would incorrectly store something 467 * In that case, the driver would incorrectly store something
465 // in NVRAM. 468 * in NVRAM.
469 */
466 if ((p_EV_header->Version == 2) || 470 if ((p_EV_header->Version == 2) ||
467 ((p_EV_header->Version == 1) && !ctrl->push_flag)) { 471 ((p_EV_header->Version == 1) && !ctrl->push_flag)) {
468 p_byte = &(p_EV_header->next); 472 p_byte = &(p_EV_header->next);
@@ -491,7 +495,7 @@ int compaq_nvram_load (void __iomem *rom_start, struct controller *ctrl)
491 if (p_byte > ((u8*)p_EV_header + evbuffer_length)) 495 if (p_byte > ((u8*)p_EV_header + evbuffer_length))
492 return 2; 496 return 2;
493 497
494 // Skip forward to the next entry 498 /* Skip forward to the next entry */
495 p_byte += (nummem + numpmem + numio + numbus) * 8; 499 p_byte += (nummem + numpmem + numio + numbus) * 8;
496 500
497 if (p_byte > ((u8*)p_EV_header + evbuffer_length)) 501 if (p_byte > ((u8*)p_EV_header + evbuffer_length))
@@ -629,8 +633,9 @@ int compaq_nvram_load (void __iomem *rom_start, struct controller *ctrl)
629 ctrl->bus_head = bus_node; 633 ctrl->bus_head = bus_node;
630 } 634 }
631 635
632 // If all of the following fail, we don't have any resources for 636 /* If all of the following fail, we don't have any resources for
633 // hot plug add 637 * hot plug add
638 */
634 rc = 1; 639 rc = 1;
635 rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head)); 640 rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
636 rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head)); 641 rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
diff --git a/drivers/pci/hotplug/cpqphp_pci.c b/drivers/pci/hotplug/cpqphp_pci.c
index 573a2702fb6a..2e96bae3c82a 100644
--- a/drivers/pci/hotplug/cpqphp_pci.c
+++ b/drivers/pci/hotplug/cpqphp_pci.c
@@ -178,17 +178,17 @@ int cpqhp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num)
178 if (!rc) 178 if (!rc)
179 return !rc; 179 return !rc;
180 180
181 // set the Edge Level Control Register (ELCR) 181 /* set the Edge Level Control Register (ELCR) */
182 temp_word = inb(0x4d0); 182 temp_word = inb(0x4d0);
183 temp_word |= inb(0x4d1) << 8; 183 temp_word |= inb(0x4d1) << 8;
184 184
185 temp_word |= 0x01 << irq_num; 185 temp_word |= 0x01 << irq_num;
186 186
187 // This should only be for x86 as it sets the Edge Level Control Register 187 /* This should only be for x86 as it sets the Edge Level
188 outb((u8) (temp_word & 0xFF), 0x4d0); 188 * Control Register
189 outb((u8) ((temp_word & 0xFF00) >> 8), 0x4d1); 189 */
190 rc = 0; 190 outb((u8) (temp_word & 0xFF), 0x4d0); outb((u8) ((temp_word &
191 } 191 0xFF00) >> 8), 0x4d1); rc = 0; }
192 192
193 return rc; 193 return rc;
194} 194}
@@ -213,11 +213,11 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
213 ctrl->pci_bus->number = bus_num; 213 ctrl->pci_bus->number = bus_num;
214 214
215 for (tdevice = 0; tdevice < 0xFF; tdevice++) { 215 for (tdevice = 0; tdevice < 0xFF; tdevice++) {
216 //Scan for access first 216 /* Scan for access first */
217 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1) 217 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
218 continue; 218 continue;
219 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice); 219 dbg("Looking for nonbridge bus_num %d dev_num %d\n", bus_num, tdevice);
220 //Yep we got one. Not a bridge ? 220 /* Yep we got one. Not a bridge ? */
221 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) { 221 if ((work >> 8) != PCI_TO_PCI_BRIDGE_CLASS) {
222 *dev_num = tdevice; 222 *dev_num = tdevice;
223 dbg("found it !\n"); 223 dbg("found it !\n");
@@ -225,11 +225,11 @@ static int PCI_ScanBusForNonBridge(struct controller *ctrl, u8 bus_num, u8 * dev
225 } 225 }
226 } 226 }
227 for (tdevice = 0; tdevice < 0xFF; tdevice++) { 227 for (tdevice = 0; tdevice < 0xFF; tdevice++) {
228 //Scan for access first 228 /* Scan for access first */
229 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1) 229 if (PCI_RefinedAccessConfig(ctrl->pci_bus, tdevice, 0x08, &work) == -1)
230 continue; 230 continue;
231 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice); 231 dbg("Looking for bridge bus_num %d dev_num %d\n", bus_num, tdevice);
232 //Yep we got one. bridge ? 232 /* Yep we got one. bridge ? */
233 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) { 233 if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
234 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus); 234 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(tdevice, 0), PCI_SECONDARY_BUS, &tbus);
235 dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice); 235 dbg("Recurse on bus_num %d tdevice %d\n", tbus, tdevice);
@@ -257,7 +257,7 @@ static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num
257 257
258 len = (PCIIRQRoutingInfoLength->size - 258 len = (PCIIRQRoutingInfoLength->size -
259 sizeof(struct irq_routing_table)) / sizeof(struct irq_info); 259 sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
260 // Make sure I got at least one entry 260 /* Make sure I got at least one entry */
261 if (len == 0) { 261 if (len == 0) {
262 kfree(PCIIRQRoutingInfoLength ); 262 kfree(PCIIRQRoutingInfoLength );
263 return -1; 263 return -1;
@@ -304,11 +304,14 @@ static int PCI_GetBusDevHelper(struct controller *ctrl, u8 *bus_num, u8 *dev_num
304 304
305int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot) 305int cpqhp_get_bus_dev (struct controller *ctrl, u8 * bus_num, u8 * dev_num, u8 slot)
306{ 306{
307 return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0); //plain (bridges allowed) 307 /* plain (bridges allowed) */
308 return PCI_GetBusDevHelper(ctrl, bus_num, dev_num, slot, 0);
308} 309}
309 310
310 311
311/* More PCI configuration routines; this time centered around hotplug controller */ 312/* More PCI configuration routines; this time centered around hotplug
313 * controller
314 */
312 315
313 316
314/* 317/*
@@ -339,12 +342,12 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
339 int stop_it; 342 int stop_it;
340 int index; 343 int index;
341 344
342 // Decide which slots are supported 345 /* Decide which slots are supported */
343 346
344 if (is_hot_plug) { 347 if (is_hot_plug) {
345 //********************************* 348 /*
346 // is_hot_plug is the slot mask 349 * is_hot_plug is the slot mask
347 //********************************* 350 */
348 FirstSupported = is_hot_plug >> 4; 351 FirstSupported = is_hot_plug >> 4;
349 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1; 352 LastSupported = FirstSupported + (is_hot_plug & 0x0F) - 1;
350 } else { 353 } else {
@@ -352,13 +355,13 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
352 LastSupported = 0x1F; 355 LastSupported = 0x1F;
353 } 356 }
354 357
355 // Save PCI configuration space for all devices in supported slots 358 /* Save PCI configuration space for all devices in supported slots */
356 ctrl->pci_bus->number = busnumber; 359 ctrl->pci_bus->number = busnumber;
357 for (device = FirstSupported; device <= LastSupported; device++) { 360 for (device = FirstSupported; device <= LastSupported; device++) {
358 ID = 0xFFFFFFFF; 361 ID = 0xFFFFFFFF;
359 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID); 362 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, 0), PCI_VENDOR_ID, &ID);
360 363
361 if (ID != 0xFFFFFFFF) { // device in slot 364 if (ID != 0xFFFFFFFF) { /* device in slot */
362 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code); 365 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, 0), 0x0B, &class_code);
363 if (rc) 366 if (rc)
364 return rc; 367 return rc;
@@ -367,7 +370,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
367 if (rc) 370 if (rc)
368 return rc; 371 return rc;
369 372
370 // If multi-function device, set max_functions to 8 373 /* If multi-function device, set max_functions to 8 */
371 if (header_type & 0x80) 374 if (header_type & 0x80)
372 max_functions = 8; 375 max_functions = 8;
373 else 376 else
@@ -377,18 +380,19 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
377 380
378 do { 381 do {
379 DevError = 0; 382 DevError = 0;
380 383 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
381 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // P-P Bridge 384 /* Recurse the subordinate bus
382 // Recurse the subordinate bus 385 * get the subordinate bus number
383 // get the subordinate bus number 386 */
384 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus); 387 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_SECONDARY_BUS, &secondary_bus);
385 if (rc) { 388 if (rc) {
386 return rc; 389 return rc;
387 } else { 390 } else {
388 sub_bus = (int) secondary_bus; 391 sub_bus = (int) secondary_bus;
389 392
390 // Save secondary bus cfg spc 393 /* Save secondary bus cfg spc
391 // with this recursive call. 394 * with this recursive call.
395 */
392 rc = cpqhp_save_config(ctrl, sub_bus, 0); 396 rc = cpqhp_save_config(ctrl, sub_bus, 0);
393 if (rc) 397 if (rc)
394 return rc; 398 return rc;
@@ -403,7 +407,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
403 new_slot = cpqhp_slot_find(busnumber, device, index++); 407 new_slot = cpqhp_slot_find(busnumber, device, index++);
404 408
405 if (!new_slot) { 409 if (!new_slot) {
406 // Setup slot structure. 410 /* Setup slot structure. */
407 new_slot = cpqhp_slot_create(busnumber); 411 new_slot = cpqhp_slot_create(busnumber);
408 412
409 if (new_slot == NULL) 413 if (new_slot == NULL)
@@ -415,7 +419,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
415 new_slot->function = (u8) function; 419 new_slot->function = (u8) function;
416 new_slot->is_a_board = 1; 420 new_slot->is_a_board = 1;
417 new_slot->switch_save = 0x10; 421 new_slot->switch_save = 0x10;
418 // In case of unsupported board 422 /* In case of unsupported board */
419 new_slot->status = DevError; 423 new_slot->status = DevError;
420 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function); 424 new_slot->pci_dev = pci_find_slot(new_slot->bus, (new_slot->device << 3) | new_slot->function);
421 425
@@ -429,14 +433,15 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
429 433
430 stop_it = 0; 434 stop_it = 0;
431 435
432 // this loop skips to the next present function 436 /* this loop skips to the next present function
433 // reading in Class Code and Header type. 437 * reading in Class Code and Header type.
438 */
434 439
435 while ((function < max_functions)&&(!stop_it)) { 440 while ((function < max_functions)&&(!stop_it)) {
436 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID); 441 rc = pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(device, function), PCI_VENDOR_ID, &ID);
437 if (ID == 0xFFFFFFFF) { // nothing there. 442 if (ID == 0xFFFFFFFF) { /* nothing there. */
438 function++; 443 function++;
439 } else { // Something there 444 } else { /* Something there */
440 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code); 445 rc = pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(device, function), 0x0B, &class_code);
441 if (rc) 446 if (rc)
442 return rc; 447 return rc;
@@ -450,9 +455,9 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
450 } 455 }
451 456
452 } while (function < max_functions); 457 } while (function < max_functions);
453 } // End of IF (device in slot?) 458 } /* End of IF (device in slot?) */
454 else if (is_hot_plug) { 459 else if (is_hot_plug) {
455 // Setup slot structure with entry for empty slot 460 /* Setup slot structure with entry for empty slot */
456 new_slot = cpqhp_slot_create(busnumber); 461 new_slot = cpqhp_slot_create(busnumber);
457 462
458 if (new_slot == NULL) { 463 if (new_slot == NULL) {
@@ -466,7 +471,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
466 new_slot->presence_save = 0; 471 new_slot->presence_save = 0;
467 new_slot->switch_save = 0; 472 new_slot->switch_save = 0;
468 } 473 }
469 } // End of FOR loop 474 } /* End of FOR loop */
470 475
471 return(0); 476 return(0);
472} 477}
@@ -498,11 +503,11 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
498 ctrl->pci_bus->number = new_slot->bus; 503 ctrl->pci_bus->number = new_slot->bus;
499 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID); 504 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_VENDOR_ID, &ID);
500 505
501 if (ID != 0xFFFFFFFF) { // device in slot 506 if (ID != 0xFFFFFFFF) { /* device in slot */
502 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code); 507 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
503 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type); 508 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
504 509
505 if (header_type & 0x80) // Multi-function device 510 if (header_type & 0x80) /* Multi-function device */
506 max_functions = 8; 511 max_functions = 8;
507 else 512 else
508 max_functions = 1; 513 max_functions = 1;
@@ -510,19 +515,21 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
510 function = 0; 515 function = 0;
511 516
512 do { 517 do {
513 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 518 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
514 // Recurse the subordinate bus 519 /* Recurse the subordinate bus */
515 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus); 520 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
516 521
517 sub_bus = (int) secondary_bus; 522 sub_bus = (int) secondary_bus;
518 523
519 // Save the config headers for the secondary bus. 524 /* Save the config headers for the secondary
525 * bus.
526 */
520 rc = cpqhp_save_config(ctrl, sub_bus, 0); 527 rc = cpqhp_save_config(ctrl, sub_bus, 0);
521 if (rc) 528 if (rc)
522 return(rc); 529 return(rc);
523 ctrl->pci_bus->number = new_slot->bus; 530 ctrl->pci_bus->number = new_slot->bus;
524 531
525 } // End of IF 532 } /* End of IF */
526 533
527 new_slot->status = 0; 534 new_slot->status = 0;
528 535
@@ -534,15 +541,15 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
534 541
535 stop_it = 0; 542 stop_it = 0;
536 543
537 // this loop skips to the next present function 544 /* this loop skips to the next present function
538 // reading in the Class Code and the Header type. 545 * reading in the Class Code and the Header type.
539 546 */
540 while ((function < max_functions) && (!stop_it)) { 547 while ((function < max_functions) && (!stop_it)) {
541 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID); 548 pci_bus_read_config_dword (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_VENDOR_ID, &ID);
542 549
543 if (ID == 0xFFFFFFFF) { // nothing there. 550 if (ID == 0xFFFFFFFF) { /* nothing there. */
544 function++; 551 function++;
545 } else { // Something there 552 } else { /* Something there */
546 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code); 553 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), 0x0B, &class_code);
547 554
548 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type); 555 pci_bus_read_config_byte (ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_HEADER_TYPE, &header_type);
@@ -552,7 +559,7 @@ int cpqhp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot)
552 } 559 }
553 560
554 } while (function < max_functions); 561 } while (function < max_functions);
555 } // End of IF (device in slot?) 562 } /* End of IF (device in slot?) */
556 else { 563 else {
557 return 2; 564 return 2;
558 } 565 }
@@ -590,11 +597,10 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
590 pci_bus->number = func->bus; 597 pci_bus->number = func->bus;
591 devfn = PCI_DEVFN(func->device, func->function); 598 devfn = PCI_DEVFN(func->device, func->function);
592 599
593 // Check for Bridge 600 /* Check for Bridge */
594 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 601 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
595 602
596 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { 603 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
597 // PCI-PCI Bridge
598 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); 604 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
599 605
600 sub_bus = (int) secondary_bus; 606 sub_bus = (int) secondary_bus;
@@ -610,23 +616,27 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
610 } 616 }
611 pci_bus->number = func->bus; 617 pci_bus->number = func->bus;
612 618
613 //FIXME: this loop is duplicated in the non-bridge case. The two could be rolled together 619 /* FIXME: this loop is duplicated in the non-bridge
614 // Figure out IO and memory base lengths 620 * case. The two could be rolled together Figure out
621 * IO and memory base lengths
622 */
615 for (cloop = 0x10; cloop <= 0x14; cloop += 4) { 623 for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
616 temp_register = 0xFFFFFFFF; 624 temp_register = 0xFFFFFFFF;
617 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); 625 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
618 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); 626 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
619 627 /* If this register is implemented */
620 if (base) { // If this register is implemented 628 if (base) {
621 if (base & 0x01L) { 629 if (base & 0x01L) {
622 // IO base 630 /* IO base
623 // set base = amount of IO space requested 631 * set base = amount of IO space
632 * requested
633 */
624 base = base & 0xFFFFFFFE; 634 base = base & 0xFFFFFFFE;
625 base = (~base) + 1; 635 base = (~base) + 1;
626 636
627 type = 1; 637 type = 1;
628 } else { 638 } else {
629 // memory base 639 /* memory base */
630 base = base & 0xFFFFFFF0; 640 base = base & 0xFFFFFFF0;
631 base = (~base) + 1; 641 base = (~base) + 1;
632 642
@@ -637,32 +647,36 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
637 type = 0; 647 type = 0;
638 } 648 }
639 649
640 // Save information in slot structure 650 /* Save information in slot structure */
641 func->base_length[(cloop - 0x10) >> 2] = 651 func->base_length[(cloop - 0x10) >> 2] =
642 base; 652 base;
643 func->base_type[(cloop - 0x10) >> 2] = type; 653 func->base_type[(cloop - 0x10) >> 2] = type;
644 654
645 } // End of base register loop 655 } /* End of base register loop */
646
647 656
648 } else if ((header_type & 0x7F) == 0x00) { // PCI-PCI Bridge 657 } else if ((header_type & 0x7F) == 0x00) {
649 // Figure out IO and memory base lengths 658 /* Figure out IO and memory base lengths */
650 for (cloop = 0x10; cloop <= 0x24; cloop += 4) { 659 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
651 temp_register = 0xFFFFFFFF; 660 temp_register = 0xFFFFFFFF;
652 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); 661 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
653 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); 662 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
654 663
655 if (base) { // If this register is implemented 664 /* If this register is implemented */
665 if (base) {
656 if (base & 0x01L) { 666 if (base & 0x01L) {
657 // IO base 667 /* IO base
658 // base = amount of IO space requested 668 * base = amount of IO space
669 * requested
670 */
659 base = base & 0xFFFFFFFE; 671 base = base & 0xFFFFFFFE;
660 base = (~base) + 1; 672 base = (~base) + 1;
661 673
662 type = 1; 674 type = 1;
663 } else { 675 } else {
664 // memory base 676 /* memory base
665 // base = amount of memory space requested 677 * base = amount of memory
678 * space requested
679 */
666 base = base & 0xFFFFFFF0; 680 base = base & 0xFFFFFFF0;
667 base = (~base) + 1; 681 base = (~base) + 1;
668 682
@@ -673,16 +687,16 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func * func)
673 type = 0; 687 type = 0;
674 } 688 }
675 689
676 // Save information in slot structure 690 /* Save information in slot structure */
677 func->base_length[(cloop - 0x10) >> 2] = base; 691 func->base_length[(cloop - 0x10) >> 2] = base;
678 func->base_type[(cloop - 0x10) >> 2] = type; 692 func->base_type[(cloop - 0x10) >> 2] = type;
679 693
680 } // End of base register loop 694 } /* End of base register loop */
681 695
682 } else { // Some other unknown header type 696 } else { /* Some other unknown header type */
683 } 697 }
684 698
685 // find the next device in this slot 699 /* find the next device in this slot */
686 func = cpqhp_slot_find(func->bus, func->device, index++); 700 func = cpqhp_slot_find(func->bus, func->device, index++);
687 } 701 }
688 702
@@ -728,18 +742,18 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
728 pci_bus->number = func->bus; 742 pci_bus->number = func->bus;
729 devfn = PCI_DEVFN(func->device, func->function); 743 devfn = PCI_DEVFN(func->device, func->function);
730 744
731 // Save the command register 745 /* Save the command register */
732 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command); 746 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command);
733 747
734 // disable card 748 /* disable card */
735 command = 0x00; 749 command = 0x00;
736 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command); 750 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command);
737 751
738 // Check for Bridge 752 /* Check for Bridge */
739 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 753 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
740 754
741 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 755 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
742 // Clear Bridge Control Register 756 /* Clear Bridge Control Register */
743 command = 0x00; 757 command = 0x00;
744 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command); 758 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
745 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); 759 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
@@ -755,7 +769,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
755 bus_node->next = func->bus_head; 769 bus_node->next = func->bus_head;
756 func->bus_head = bus_node; 770 func->bus_head = bus_node;
757 771
758 // Save IO base and Limit registers 772 /* Save IO base and Limit registers */
759 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base); 773 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base);
760 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length); 774 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length);
761 775
@@ -771,7 +785,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
771 func->io_head = io_node; 785 func->io_head = io_node;
772 } 786 }
773 787
774 // Save memory base and Limit registers 788 /* Save memory base and Limit registers */
775 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base); 789 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base);
776 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length); 790 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length);
777 791
@@ -787,7 +801,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
787 func->mem_head = mem_node; 801 func->mem_head = mem_node;
788 } 802 }
789 803
790 // Save prefetchable memory base and Limit registers 804 /* Save prefetchable memory base and Limit registers */
791 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base); 805 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base);
792 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length); 806 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length);
793 807
@@ -802,7 +816,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
802 p_mem_node->next = func->p_mem_head; 816 p_mem_node->next = func->p_mem_head;
803 func->p_mem_head = p_mem_node; 817 func->p_mem_head = p_mem_node;
804 } 818 }
805 // Figure out IO and memory base lengths 819 /* Figure out IO and memory base lengths */
806 for (cloop = 0x10; cloop <= 0x14; cloop += 4) { 820 for (cloop = 0x10; cloop <= 0x14; cloop += 4) {
807 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base); 821 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base);
808 822
@@ -812,11 +826,14 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
812 826
813 temp_register = base; 827 temp_register = base;
814 828
815 if (base) { // If this register is implemented 829 /* If this register is implemented */
830 if (base) {
816 if (((base & 0x03L) == 0x01) 831 if (((base & 0x03L) == 0x01)
817 && (save_command & 0x01)) { 832 && (save_command & 0x01)) {
818 // IO base 833 /* IO base
819 // set temp_register = amount of IO space requested 834 * set temp_register = amount
835 * of IO space requested
836 */
820 temp_register = base & 0xFFFFFFFE; 837 temp_register = base & 0xFFFFFFFE;
821 temp_register = (~temp_register) + 1; 838 temp_register = (~temp_register) + 1;
822 839
@@ -834,7 +851,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
834 } else 851 } else
835 if (((base & 0x0BL) == 0x08) 852 if (((base & 0x0BL) == 0x08)
836 && (save_command & 0x02)) { 853 && (save_command & 0x02)) {
837 // prefetchable memory base 854 /* prefetchable memory base */
838 temp_register = base & 0xFFFFFFF0; 855 temp_register = base & 0xFFFFFFF0;
839 temp_register = (~temp_register) + 1; 856 temp_register = (~temp_register) + 1;
840 857
@@ -851,7 +868,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
851 } else 868 } else
852 if (((base & 0x0BL) == 0x00) 869 if (((base & 0x0BL) == 0x00)
853 && (save_command & 0x02)) { 870 && (save_command & 0x02)) {
854 // prefetchable memory base 871 /* prefetchable memory base */
855 temp_register = base & 0xFFFFFFF0; 872 temp_register = base & 0xFFFFFFF0;
856 temp_register = (~temp_register) + 1; 873 temp_register = (~temp_register) + 1;
857 874
@@ -868,9 +885,10 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
868 } else 885 } else
869 return(1); 886 return(1);
870 } 887 }
871 } // End of base register loop 888 } /* End of base register loop */
872 } else if ((header_type & 0x7F) == 0x00) { // Standard header 889 /* Standard header */
873 // Figure out IO and memory base lengths 890 } else if ((header_type & 0x7F) == 0x00) {
891 /* Figure out IO and memory base lengths */
874 for (cloop = 0x10; cloop <= 0x24; cloop += 4) { 892 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
875 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base); 893 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
876 894
@@ -880,11 +898,14 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
880 898
881 temp_register = base; 899 temp_register = base;
882 900
883 if (base) { // If this register is implemented 901 /* If this register is implemented */
902 if (base) {
884 if (((base & 0x03L) == 0x01) 903 if (((base & 0x03L) == 0x01)
885 && (save_command & 0x01)) { 904 && (save_command & 0x01)) {
886 // IO base 905 /* IO base
887 // set temp_register = amount of IO space requested 906 * set temp_register = amount
907 * of IO space requested
908 */
888 temp_register = base & 0xFFFFFFFE; 909 temp_register = base & 0xFFFFFFFE;
889 temp_register = (~temp_register) + 1; 910 temp_register = (~temp_register) + 1;
890 911
@@ -901,7 +922,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
901 } else 922 } else
902 if (((base & 0x0BL) == 0x08) 923 if (((base & 0x0BL) == 0x08)
903 && (save_command & 0x02)) { 924 && (save_command & 0x02)) {
904 // prefetchable memory base 925 /* prefetchable memory base */
905 temp_register = base & 0xFFFFFFF0; 926 temp_register = base & 0xFFFFFFF0;
906 temp_register = (~temp_register) + 1; 927 temp_register = (~temp_register) + 1;
907 928
@@ -918,7 +939,7 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
918 } else 939 } else
919 if (((base & 0x0BL) == 0x00) 940 if (((base & 0x0BL) == 0x00)
920 && (save_command & 0x02)) { 941 && (save_command & 0x02)) {
921 // prefetchable memory base 942 /* prefetchable memory base */
922 temp_register = base & 0xFFFFFFF0; 943 temp_register = base & 0xFFFFFFF0;
923 temp_register = (~temp_register) + 1; 944 temp_register = (~temp_register) + 1;
924 945
@@ -935,11 +956,12 @@ int cpqhp_save_used_resources (struct controller *ctrl, struct pci_func * func)
935 } else 956 } else
936 return(1); 957 return(1);
937 } 958 }
938 } // End of base register loop 959 } /* End of base register loop */
939 } else { // Some other unknown header type 960 /* Some other unknown header type */
961 } else {
940 } 962 }
941 963
942 // find the next device in this slot 964 /* find the next device in this slot */
943 func = cpqhp_slot_find(func->bus, func->device, index++); 965 func = cpqhp_slot_find(func->bus, func->device, index++);
944 } 966 }
945 967
@@ -975,16 +997,17 @@ int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
975 pci_bus->number = func->bus; 997 pci_bus->number = func->bus;
976 devfn = PCI_DEVFN(func->device, func->function); 998 devfn = PCI_DEVFN(func->device, func->function);
977 999
978 // Start at the top of config space so that the control 1000 /* Start at the top of config space so that the control
979 // registers are programmed last 1001 * registers are programmed last
1002 */
980 for (cloop = 0x3C; cloop > 0; cloop -= 4) { 1003 for (cloop = 0x3C; cloop > 0; cloop -= 4) {
981 pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]); 1004 pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]);
982 } 1005 }
983 1006
984 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 1007 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
985 1008
986 // If this is a bridge device, restore subordinate devices 1009 /* If this is a bridge device, restore subordinate devices */
987 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 1010 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
988 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); 1011 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
989 1012
990 sub_bus = (int) secondary_bus; 1013 sub_bus = (int) secondary_bus;
@@ -1000,8 +1023,9 @@ int cpqhp_configure_board(struct controller *ctrl, struct pci_func * func)
1000 } 1023 }
1001 } else { 1024 } else {
1002 1025
1003 // Check all the base Address Registers to make sure 1026 /* Check all the base Address Registers to make sure
1004 // they are the same. If not, the board is different. 1027 * they are the same. If not, the board is different.
1028 */
1005 1029
1006 for (cloop = 16; cloop < 40; cloop += 4) { 1030 for (cloop = 16; cloop < 40; cloop += 4) {
1007 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp); 1031 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp);
@@ -1058,27 +1082,28 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1058 1082
1059 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register); 1083 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register);
1060 1084
1061 // No adapter present 1085 /* No adapter present */
1062 if (temp_register == 0xFFFFFFFF) 1086 if (temp_register == 0xFFFFFFFF)
1063 return(NO_ADAPTER_PRESENT); 1087 return(NO_ADAPTER_PRESENT);
1064 1088
1065 if (temp_register != func->config_space[0]) 1089 if (temp_register != func->config_space[0])
1066 return(ADAPTER_NOT_SAME); 1090 return(ADAPTER_NOT_SAME);
1067 1091
1068 // Check for same revision number and class code 1092 /* Check for same revision number and class code */
1069 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register); 1093 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register);
1070 1094
1071 // Adapter not the same 1095 /* Adapter not the same */
1072 if (temp_register != func->config_space[0x08 >> 2]) 1096 if (temp_register != func->config_space[0x08 >> 2])
1073 return(ADAPTER_NOT_SAME); 1097 return(ADAPTER_NOT_SAME);
1074 1098
1075 // Check for Bridge 1099 /* Check for Bridge */
1076 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); 1100 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
1077 1101
1078 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) { // PCI-PCI Bridge 1102 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1079 // In order to continue checking, we must program the 1103 /* In order to continue checking, we must program the
1080 // bus registers in the bridge to respond to accesses 1104 * bus registers in the bridge to respond to accesses
1081 // for it's subordinate bus(es) 1105 * for its subordinate bus(es)
1106 */
1082 1107
1083 temp_register = func->config_space[0x18 >> 2]; 1108 temp_register = func->config_space[0x18 >> 2];
1084 pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register); 1109 pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register);
@@ -1096,35 +1121,39 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1096 } 1121 }
1097 1122
1098 } 1123 }
1099 // Check to see if it is a standard config header 1124 /* Check to see if it is a standard config header */
1100 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) { 1125 else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
1101 // Check subsystem vendor and ID 1126 /* Check subsystem vendor and ID */
1102 pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register); 1127 pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
1103 1128
1104 if (temp_register != func->config_space[0x2C >> 2]) { 1129 if (temp_register != func->config_space[0x2C >> 2]) {
1105 // If it's a SMART-2 and the register isn't filled 1130 /* If it's a SMART-2 and the register isn't
1106 // in, ignore the difference because 1131 * filled in, ignore the difference because
1107 // they just have an old rev of the firmware 1132 * they just have an old rev of the firmware
1108 1133 */
1109 if (!((func->config_space[0] == 0xAE100E11) 1134 if (!((func->config_space[0] == 0xAE100E11)
1110 && (temp_register == 0x00L))) 1135 && (temp_register == 0x00L)))
1111 return(ADAPTER_NOT_SAME); 1136 return(ADAPTER_NOT_SAME);
1112 } 1137 }
1113 // Figure out IO and memory base lengths 1138 /* Figure out IO and memory base lengths */
1114 for (cloop = 0x10; cloop <= 0x24; cloop += 4) { 1139 for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
1115 temp_register = 0xFFFFFFFF; 1140 temp_register = 0xFFFFFFFF;
1116 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); 1141 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register);
1117 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); 1142 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base);
1118 if (base) { // If this register is implemented 1143
1144 /* If this register is implemented */
1145 if (base) {
1119 if (base & 0x01L) { 1146 if (base & 0x01L) {
1120 // IO base 1147 /* IO base
1121 // set base = amount of IO space requested 1148 * set base = amount of IO
1149 * space requested
1150 */
1122 base = base & 0xFFFFFFFE; 1151 base = base & 0xFFFFFFFE;
1123 base = (~base) + 1; 1152 base = (~base) + 1;
1124 1153
1125 type = 1; 1154 type = 1;
1126 } else { 1155 } else {
1127 // memory base 1156 /* memory base */
1128 base = base & 0xFFFFFFF0; 1157 base = base & 0xFFFFFFF0;
1129 base = (~base) + 1; 1158 base = (~base) + 1;
1130 1159
@@ -1135,23 +1164,24 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func * func)
1135 type = 0; 1164 type = 0;
1136 } 1165 }
1137 1166
1138 // Check information in slot structure 1167 /* Check information in slot structure */
1139 if (func->base_length[(cloop - 0x10) >> 2] != base) 1168 if (func->base_length[(cloop - 0x10) >> 2] != base)
1140 return(ADAPTER_NOT_SAME); 1169 return(ADAPTER_NOT_SAME);
1141 1170
1142 if (func->base_type[(cloop - 0x10) >> 2] != type) 1171 if (func->base_type[(cloop - 0x10) >> 2] != type)
1143 return(ADAPTER_NOT_SAME); 1172 return(ADAPTER_NOT_SAME);
1144 1173
1145 } // End of base register loop 1174 } /* End of base register loop */
1146 1175
1147 } // End of (type 0 config space) else 1176 } /* End of (type 0 config space) else */
1148 else { 1177 else {
1149 // this is not a type 0 or 1 config space header so 1178 /* this is not a type 0 or 1 config space header so
1150 // we don't know how to do it 1179 * we don't know how to do it
1180 */
1151 return(DEVICE_TYPE_NOT_SUPPORTED); 1181 return(DEVICE_TYPE_NOT_SUPPORTED);
1152 } 1182 }
1153 1183
1154 // Get the next function 1184 /* Get the next function */
1155 func = cpqhp_slot_find(func->bus, func->device, index++); 1185 func = cpqhp_slot_find(func->bus, func->device, index++);
1156 } 1186 }
1157 1187
@@ -1190,7 +1220,7 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1190 if (rom_resource_table == NULL) { 1220 if (rom_resource_table == NULL) {
1191 return -ENODEV; 1221 return -ENODEV;
1192 } 1222 }
1193 // Sum all resources and setup resource maps 1223 /* Sum all resources and setup resource maps */
1194 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ); 1224 unused_IRQ = readl(rom_resource_table + UNUSED_IRQ);
1195 dbg("unused_IRQ = %x\n", unused_IRQ); 1225 dbg("unused_IRQ = %x\n", unused_IRQ);
1196 1226
@@ -1262,13 +1292,13 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1262 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length, 1292 dev_func, io_base, io_length, mem_base, mem_length, pre_mem_base, pre_mem_length,
1263 primary_bus, secondary_bus, max_bus); 1293 primary_bus, secondary_bus, max_bus);
1264 1294
1265 // If this entry isn't for our controller's bus, ignore it 1295 /* If this entry isn't for our controller's bus, ignore it */
1266 if (primary_bus != ctrl->bus) { 1296 if (primary_bus != ctrl->bus) {
1267 i--; 1297 i--;
1268 one_slot += sizeof (struct slot_rt); 1298 one_slot += sizeof (struct slot_rt);
1269 continue; 1299 continue;
1270 } 1300 }
1271 // find out if this entry is for an occupied slot 1301 /* find out if this entry is for an occupied slot */
1272 ctrl->pci_bus->number = primary_bus; 1302 ctrl->pci_bus->number = primary_bus;
1273 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword); 1303 pci_bus_read_config_dword (ctrl->pci_bus, dev_func, PCI_VENDOR_ID, &temp_dword);
1274 dbg("temp_D_word = %x\n", temp_dword); 1304 dbg("temp_D_word = %x\n", temp_dword);
@@ -1282,13 +1312,13 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1282 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++); 1312 func = cpqhp_slot_find(primary_bus, dev_func >> 3, index++);
1283 } 1313 }
1284 1314
1285 // If we can't find a match, skip this table entry 1315 /* If we can't find a match, skip this table entry */
1286 if (!func) { 1316 if (!func) {
1287 i--; 1317 i--;
1288 one_slot += sizeof (struct slot_rt); 1318 one_slot += sizeof (struct slot_rt);
1289 continue; 1319 continue;
1290 } 1320 }
1291 // this may not work and shouldn't be used 1321 /* this may not work and shouldn't be used */
1292 if (secondary_bus != primary_bus) 1322 if (secondary_bus != primary_bus)
1293 bridged_slot = 1; 1323 bridged_slot = 1;
1294 else 1324 else
@@ -1301,7 +1331,7 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1301 } 1331 }
1302 1332
1303 1333
1304 // If we've got a valid IO base, use it 1334 /* If we've got a valid IO base, use it */
1305 1335
1306 temp_dword = io_base + io_length; 1336 temp_dword = io_base + io_length;
1307 1337
@@ -1325,7 +1355,7 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1325 } 1355 }
1326 } 1356 }
1327 1357
1328 // If we've got a valid memory base, use it 1358 /* If we've got a valid memory base, use it */
1329 temp_dword = mem_base + mem_length; 1359 temp_dword = mem_base + mem_length;
1330 if ((mem_base) && (temp_dword < 0x10000)) { 1360 if ((mem_base) && (temp_dword < 0x10000)) {
1331 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL); 1361 mem_node = kmalloc(sizeof(*mem_node), GFP_KERNEL);
@@ -1348,8 +1378,9 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1348 } 1378 }
1349 } 1379 }
1350 1380
1351 // If we've got a valid prefetchable memory base, and 1381 /* If we've got a valid prefetchable memory base, and
1352 // the base + length isn't greater than 0xFFFF 1382 * the base + length isn't greater than 0xFFFF
1383 */
1353 temp_dword = pre_mem_base + pre_mem_length; 1384 temp_dword = pre_mem_base + pre_mem_length;
1354 if ((pre_mem_base) && (temp_dword < 0x10000)) { 1385 if ((pre_mem_base) && (temp_dword < 0x10000)) {
1355 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL); 1386 p_mem_node = kmalloc(sizeof(*p_mem_node), GFP_KERNEL);
@@ -1372,9 +1403,10 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1372 } 1403 }
1373 } 1404 }
1374 1405
1375 // If we've got a valid bus number, use it 1406 /* If we've got a valid bus number, use it
1376 // The second condition is to ignore bus numbers on 1407 * The second condition is to ignore bus numbers on
1377 // populated slots that don't have PCI-PCI bridges 1408 * populated slots that don't have PCI-PCI bridges
1409 */
1378 if (secondary_bus && (secondary_bus != primary_bus)) { 1410 if (secondary_bus && (secondary_bus != primary_bus)) {
1379 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL); 1411 bus_node = kmalloc(sizeof(*bus_node), GFP_KERNEL);
1380 if (!bus_node) 1412 if (!bus_node)
@@ -1398,8 +1430,9 @@ int cpqhp_find_available_resources(struct controller *ctrl, void __iomem *rom_st
1398 one_slot += sizeof (struct slot_rt); 1430 one_slot += sizeof (struct slot_rt);
1399 } 1431 }
1400 1432
1401 // If all of the following fail, we don't have any resources for 1433 /* If all of the following fail, we don't have any resources for
1402 // hot plug add 1434 * hot plug add
1435 */
1403 rc = 1; 1436 rc = 1;
1404 rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head)); 1437 rc &= cpqhp_resource_sort_and_combine(&(ctrl->mem_head));
1405 rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head)); 1438 rc &= cpqhp_resource_sort_and_combine(&(ctrl->p_mem_head));
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-27 22:41:42 -0500