Merge branch 'pci/host-generic' into next

* pci/host-generic:
  arm64: Add architectural support for PCI
  PCI: Add pci_remap_iospace() to map bus I/O resources
  of/pci: Add support for parsing PCI host bridge resources from DT
  of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()
  PCI: Add generic domain handling
  of/pci: Fix the conversion of IO ranges into IO resources
  of/pci: Move of_pci_range_to_resource() to of/address.c
  ARM: Define PCI_IOBASE as the base of virtual PCI IO space
  of/pci: Add pci_register_io_range() and pci_pio_to_address()
  asm-generic/io.h: Fix ioport_map() for !CONFIG_GENERIC_IOMAP

Conflicts:
	drivers/pci/host/pci-tegra.c

4 files changed, 72 insertions, 12 deletions

diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c
index 79a30476036c..3d43874319be 100644
--- a/drivers/pci/host/pci-tegra.c
+++ b/drivers/pci/host/pci-tegra.c
@@ -658,6 +658,7 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
 {
         struct tegra_pcie *pcie = sys_to_pcie(sys);
         int err;
+        phys_addr_t io_start;
 
         err = devm_request_resource(pcie->dev, &pcie->all, &pcie->mem);
         if (err < 0)
@@ -667,12 +668,14 @@ static int tegra_pcie_setup(int nr, struct pci_sys_data *sys)
         if (err)
                 return err;
 
+        io_start = pci_pio_to_address(pcie->io.start);
+
         pci_add_resource_offset(&sys->resources, &pcie->mem, sys->mem_offset);
         pci_add_resource_offset(&sys->resources, &pcie->prefetch,
                                 sys->mem_offset);
         pci_add_resource(&sys->resources, &pcie->busn);
 
-        pci_ioremap_io(nr * SZ_64K, pcie->io.start);
+        pci_ioremap_io(nr * SZ_64K, io_start);
 
         return 1;
 }
@@ -783,6 +786,7 @@ static irqreturn_t tegra_pcie_isr(int irq, void *arg)
 static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
 {
         u32 fpci_bar, size, axi_address;
+        phys_addr_t io_start = pci_pio_to_address(pcie->io.start);
 
         /* Bar 0: type 1 extended configuration space */
         fpci_bar = 0xfe100000;
@@ -795,7 +799,7 @@ static void tegra_pcie_setup_translations(struct tegra_pcie *pcie)
         /* Bar 1: downstream IO bar */
         fpci_bar = 0xfdfc0000;
         size = resource_size(&pcie->io);
-        axi_address = pcie->io.start;
+        axi_address = io_start;
         afi_writel(pcie, axi_address, AFI_AXI_BAR1_START);
         afi_writel(pcie, size >> 12, AFI_AXI_BAR1_SZ);
         afi_writel(pcie, fpci_bar, AFI_FPCI_BAR1);
@@ -1680,7 +1684,9 @@ static int tegra_pcie_parse_dt(struct tegra_pcie *pcie)
         }
 
         for_each_of_pci_range(&parser, &range) {
-                of_pci_range_to_resource(&range, np, &res);
+                err = of_pci_range_to_resource(&range, np, &res);
+                if (err < 0)
+                        return err;
 
                 switch (res.flags & IORESOURCE_TYPE_BITS) {
                 case IORESOURCE_IO:
diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c
index 4884ee5e07d4..61158e03ab5f 100644
--- a/drivers/pci/host/pcie-rcar.c
+++ b/drivers/pci/host/pcie-rcar.c
@@ -323,6 +323,7 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
 
         /* Setup PCIe address space mappings for each resource */
         resource_size_t size;
+        resource_size_t res_start;
         u32 mask;
 
         rcar_pci_write_reg(pcie, 0x00000000, PCIEPTCTLR(win));
@@ -335,8 +336,13 @@ static void rcar_pcie_setup_window(int win, struct rcar_pcie *pcie)
         mask = (roundup_pow_of_two(size) / SZ_128) - 1;
         rcar_pci_write_reg(pcie, mask << 7, PCIEPAMR(win));
 
-        rcar_pci_write_reg(pcie, upper_32_bits(res->start), PCIEPARH(win));
-        rcar_pci_write_reg(pcie, lower_32_bits(res->start), PCIEPARL(win));
+        if (res->flags & IORESOURCE_IO)
+                res_start = pci_pio_to_address(res->start);
+        else
+                res_start = res->start;
+
+        rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPARH(win));
+        rcar_pci_write_reg(pcie, lower_32_bits(res_start), PCIEPARL(win));
 
         /* First resource is for IO */
         mask = PAR_ENABLE;
@@ -363,9 +369,10 @@ static int rcar_pcie_setup(int nr, struct pci_sys_data *sys)
 
                 rcar_pcie_setup_window(i, pcie);
 
-                if (res->flags & IORESOURCE_IO)
-                        pci_ioremap_io(nr * SZ_64K, res->start);
-                else
+                if (res->flags & IORESOURCE_IO) {
+                        phys_addr_t io_start = pci_pio_to_address(res->start);
+                        pci_ioremap_io(nr * SZ_64K, io_start);
+                } else
                         pci_add_resource(&sys->resources, res);
         }
         pci_add_resource(&sys->resources, &pcie->busn);
@@ -935,8 +942,10 @@ static int rcar_pcie_probe(struct platform_device *pdev)
         }
 
         for_each_of_pci_range(&parser, &range) {
-                of_pci_range_to_resource(&range, pdev->dev.of_node,
+                err = of_pci_range_to_resource(&range, pdev->dev.of_node,
                                                 &pcie->res[win++]);
+                if (err < 0)
+                        return err;
 
                 if (win > RCAR_PCI_MAX_RESOURCES)
                         break;
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index b7678be7b106..625a4ace10b4 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2707,6 +2707,37 @@ int pci_request_regions_exclusive(struct pci_dev *pdev, const char *res_name)
 }
 EXPORT_SYMBOL(pci_request_regions_exclusive);
 
+/**
+ *      pci_remap_iospace - Remap the memory mapped I/O space
+ *      @res: Resource describing the I/O space
+ *      @phys_addr: physical address of range to be mapped
+ *
+ *      Remap the memory mapped I/O space described by the @res
+ *      and the CPU physical address @phys_addr into virtual address space.
+ *      Only architectures that have memory mapped IO functions defined
+ *      (and the PCI_IOBASE value defined) should call this function.
+ */
+int __weak pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
+{
+#if defined(PCI_IOBASE) && defined(CONFIG_MMU)
+        unsigned long vaddr = (unsigned long)PCI_IOBASE + res->start;
+
+        if (!(res->flags & IORESOURCE_IO))
+                return -EINVAL;
+
+        if (res->end > IO_SPACE_LIMIT)
+                return -EINVAL;
+
+        return ioremap_page_range(vaddr, vaddr + resource_size(res), phys_addr,
+                                  pgprot_device(PAGE_KERNEL));
+#else
+        /* this architecture does not have memory mapped I/O space,
+           so this function should never be called */
+        WARN_ONCE(1, "This architecture does not support memory mapped I/O\n");
+        return -ENODEV;
+#endif
+}
+
 static void __pci_set_master(struct pci_dev *dev, bool enable)
 {
         u16 old_cmd, cmd;
@@ -4409,6 +4440,15 @@ static void pci_no_domains(void)
 #endif
 }
 
+#ifdef CONFIG_PCI_DOMAINS
+static atomic_t __domain_nr = ATOMIC_INIT(-1);
+
+int pci_get_new_domain_nr(void)
+{
+        return atomic_inc_return(&__domain_nr);
+}
+#endif
+
 /**
  * pci_ext_cfg_avail - can we access extended PCI config space?
  *
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index c99c4d65461b..efa48dc0de3b 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -486,7 +486,7 @@ void pci_read_bridge_bases(struct pci_bus *child)
         }
 }
 
-static struct pci_bus *pci_alloc_bus(void)
+static struct pci_bus *pci_alloc_bus(struct pci_bus *parent)
 {
         struct pci_bus *b;
 
@@ -501,6 +501,10 @@ static struct pci_bus *pci_alloc_bus(void)
         INIT_LIST_HEAD(&b->resources);
         b->max_bus_speed = PCI_SPEED_UNKNOWN;
         b->cur_bus_speed = PCI_SPEED_UNKNOWN;
+#ifdef CONFIG_PCI_DOMAINS_GENERIC
+        if (parent)
+                b->domain_nr = parent->domain_nr;
+#endif
         return b;
 }
 
@@ -672,7 +676,7 @@ static struct pci_bus *pci_alloc_child_bus(struct pci_bus *parent,
         /*
          * Allocate a new bus, and inherit stuff from the parent..
          */
-        child = pci_alloc_bus();
+        child = pci_alloc_bus(parent);
         if (!child)
                 return NULL;
 
@@ -1913,13 +1917,14 @@ struct pci_bus *pci_create_root_bus(struct device *parent, int bus,
         char bus_addr[64];
         char *fmt;
 
-        b = pci_alloc_bus();
+        b = pci_alloc_bus(NULL);
         if (!b)
                 return NULL;
 
         b->sysdata = sysdata;
         b->ops = ops;
         b->number = b->busn_res.start = bus;
+        pci_bus_assign_domain_nr(b, parent);
         b2 = pci_find_bus(pci_domain_nr(b), bus);
         if (b2) {
                 /* If we already got to this bus through a different bridge, ignore it */