diff options
author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2009-05-12 23:15:38 -0400 |
---|---|---|
committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-06-18 16:57:25 -0400 |
commit | 4d246e458918d469ad645fd5f937ac22982e0466 (patch) | |
tree | 7af516967d8f9ef8824f74f9214bf74fdc93d894 /drivers/pci | |
parent | b6c2e54d3ea27719b920faf15db92dfe0260f0d2 (diff) |
PCI ASPM: cleanup clkpm state in struct pcie_link_state
The "clk_pm_capable", "clk_pm_enable" and "bios_clk_state" fields in
the struct pcie_link_state only take 1-bit value. So those fields
don't need to be defined as unsigned int. This patch makes those
fields 1-bit, and cleans up some related code.
Acked-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r-- | drivers/pci/pcie/aspm.c | 37 |
1 files changed, 18 insertions, 19 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 88351c242a48..2d7e695b7589 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c | |||
@@ -45,14 +45,13 @@ struct pcie_link_state { | |||
45 | u32 aspm_enabled:2; /* Enabled ASPM state */ | 45 | u32 aspm_enabled:2; /* Enabled ASPM state */ |
46 | u32 aspm_default:2; /* Default ASPM state by BIOS */ | 46 | u32 aspm_default:2; /* Default ASPM state by BIOS */ |
47 | 47 | ||
48 | /* Clock PM state */ | ||
49 | u32 clkpm_capable:1; /* Clock PM capable? */ | ||
50 | u32 clkpm_enabled:1; /* Current Clock PM state */ | ||
51 | u32 clkpm_default:1; /* Default Clock PM state by BIOS */ | ||
52 | |||
48 | /* Latencies */ | 53 | /* Latencies */ |
49 | struct aspm_latency latency; /* Exit latency */ | 54 | struct aspm_latency latency; /* Exit latency */ |
50 | |||
51 | /* Clock PM state*/ | ||
52 | unsigned int clk_pm_capable; | ||
53 | unsigned int clk_pm_enabled; | ||
54 | unsigned int bios_clk_state; | ||
55 | |||
56 | /* | 55 | /* |
57 | * Endpoint acceptable latencies. A pcie downstream port only | 56 | * Endpoint acceptable latencies. A pcie downstream port only |
58 | * has one slot under it, so at most there are 8 functions. | 57 | * has one slot under it, so at most there are 8 functions. |
@@ -105,7 +104,7 @@ static int policy_to_clkpm_state(struct pci_dev *pdev) | |||
105 | /* Disable Clock PM */ | 104 | /* Disable Clock PM */ |
106 | return 1; | 105 | return 1; |
107 | case POLICY_DEFAULT: | 106 | case POLICY_DEFAULT: |
108 | return link_state->bios_clk_state; | 107 | return link_state->clkpm_default; |
109 | } | 108 | } |
110 | return 0; | 109 | return 0; |
111 | } | 110 | } |
@@ -128,7 +127,7 @@ static void pcie_set_clock_pm(struct pci_dev *pdev, int enable) | |||
128 | reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN; | 127 | reg16 &= ~PCI_EXP_LNKCTL_CLKREQ_EN; |
129 | pci_write_config_word(child_dev, pos + PCI_EXP_LNKCTL, reg16); | 128 | pci_write_config_word(child_dev, pos + PCI_EXP_LNKCTL, reg16); |
130 | } | 129 | } |
131 | link_state->clk_pm_enabled = !!enable; | 130 | link_state->clkpm_enabled = !!enable; |
132 | } | 131 | } |
133 | 132 | ||
134 | static void pcie_check_clock_pm(struct pci_dev *pdev, int blacklist) | 133 | static void pcie_check_clock_pm(struct pci_dev *pdev, int blacklist) |
@@ -155,13 +154,13 @@ static void pcie_check_clock_pm(struct pci_dev *pdev, int blacklist) | |||
155 | if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN)) | 154 | if (!(reg16 & PCI_EXP_LNKCTL_CLKREQ_EN)) |
156 | enabled = 0; | 155 | enabled = 0; |
157 | } | 156 | } |
158 | link_state->clk_pm_enabled = enabled; | 157 | link_state->clkpm_enabled = enabled; |
159 | link_state->bios_clk_state = enabled; | 158 | link_state->clkpm_default = enabled; |
160 | if (!blacklist) { | 159 | if (!blacklist) { |
161 | link_state->clk_pm_capable = capable; | 160 | link_state->clkpm_capable = capable; |
162 | pcie_set_clock_pm(pdev, policy_to_clkpm_state(pdev)); | 161 | pcie_set_clock_pm(pdev, policy_to_clkpm_state(pdev)); |
163 | } else { | 162 | } else { |
164 | link_state->clk_pm_capable = 0; | 163 | link_state->clkpm_capable = 0; |
165 | pcie_set_clock_pm(pdev, 0); | 164 | pcie_set_clock_pm(pdev, 0); |
166 | } | 165 | } |
167 | } | 166 | } |
@@ -774,10 +773,10 @@ void pci_disable_link_state(struct pci_dev *pdev, int state) | |||
774 | link_state = parent->link_state; | 773 | link_state = parent->link_state; |
775 | link_state->aspm_support &= ~state; | 774 | link_state->aspm_support &= ~state; |
776 | if (state & PCIE_LINK_STATE_CLKPM) | 775 | if (state & PCIE_LINK_STATE_CLKPM) |
777 | link_state->clk_pm_capable = 0; | 776 | link_state->clkpm_capable = 0; |
778 | 777 | ||
779 | __pcie_aspm_configure_link_state(parent, link_state->aspm_enabled); | 778 | __pcie_aspm_configure_link_state(parent, link_state->aspm_enabled); |
780 | if (!link_state->clk_pm_capable && link_state->clk_pm_enabled) | 779 | if (!link_state->clkpm_capable && link_state->clkpm_enabled) |
781 | pcie_set_clock_pm(parent, 0); | 780 | pcie_set_clock_pm(parent, 0); |
782 | mutex_unlock(&aspm_lock); | 781 | mutex_unlock(&aspm_lock); |
783 | up_read(&pci_bus_sem); | 782 | up_read(&pci_bus_sem); |
@@ -805,8 +804,8 @@ static int pcie_aspm_set_policy(const char *val, struct kernel_param *kp) | |||
805 | pdev = link_state->pdev; | 804 | pdev = link_state->pdev; |
806 | __pcie_aspm_configure_link_state(pdev, | 805 | __pcie_aspm_configure_link_state(pdev, |
807 | policy_to_aspm_state(pdev)); | 806 | policy_to_aspm_state(pdev)); |
808 | if (link_state->clk_pm_capable && | 807 | if (link_state->clkpm_capable && |
809 | link_state->clk_pm_enabled != policy_to_clkpm_state(pdev)) | 808 | link_state->clkpm_enabled != policy_to_clkpm_state(pdev)) |
810 | pcie_set_clock_pm(pdev, policy_to_clkpm_state(pdev)); | 809 | pcie_set_clock_pm(pdev, policy_to_clkpm_state(pdev)); |
811 | 810 | ||
812 | } | 811 | } |
@@ -867,7 +866,7 @@ static ssize_t clk_ctl_show(struct device *dev, | |||
867 | struct pci_dev *pci_device = to_pci_dev(dev); | 866 | struct pci_dev *pci_device = to_pci_dev(dev); |
868 | struct pcie_link_state *link_state = pci_device->link_state; | 867 | struct pcie_link_state *link_state = pci_device->link_state; |
869 | 868 | ||
870 | return sprintf(buf, "%d\n", link_state->clk_pm_enabled); | 869 | return sprintf(buf, "%d\n", link_state->clkpm_enabled); |
871 | } | 870 | } |
872 | 871 | ||
873 | static ssize_t clk_ctl_store(struct device *dev, | 872 | static ssize_t clk_ctl_store(struct device *dev, |
@@ -906,7 +905,7 @@ void pcie_aspm_create_sysfs_dev_files(struct pci_dev *pdev) | |||
906 | if (link_state->aspm_support) | 905 | if (link_state->aspm_support) |
907 | sysfs_add_file_to_group(&pdev->dev.kobj, | 906 | sysfs_add_file_to_group(&pdev->dev.kobj, |
908 | &dev_attr_link_state.attr, power_group); | 907 | &dev_attr_link_state.attr, power_group); |
909 | if (link_state->clk_pm_capable) | 908 | if (link_state->clkpm_capable) |
910 | sysfs_add_file_to_group(&pdev->dev.kobj, | 909 | sysfs_add_file_to_group(&pdev->dev.kobj, |
911 | &dev_attr_clk_ctl.attr, power_group); | 910 | &dev_attr_clk_ctl.attr, power_group); |
912 | } | 911 | } |
@@ -922,7 +921,7 @@ void pcie_aspm_remove_sysfs_dev_files(struct pci_dev *pdev) | |||
922 | if (link_state->aspm_support) | 921 | if (link_state->aspm_support) |
923 | sysfs_remove_file_from_group(&pdev->dev.kobj, | 922 | sysfs_remove_file_from_group(&pdev->dev.kobj, |
924 | &dev_attr_link_state.attr, power_group); | 923 | &dev_attr_link_state.attr, power_group); |
925 | if (link_state->clk_pm_capable) | 924 | if (link_state->clkpm_capable) |
926 | sysfs_remove_file_from_group(&pdev->dev.kobj, | 925 | sysfs_remove_file_from_group(&pdev->dev.kobj, |
927 | &dev_attr_clk_ctl.attr, power_group); | 926 | &dev_attr_clk_ctl.attr, power_group); |
928 | } | 927 | } |