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authorOlaf Dabrunz <od@suse.de>2008-07-08 09:59:48 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-13 16:59:46 -0400
commit542622da899be17250b8cae2ef5203025b91230a (patch)
tree977a484cf213f27f48b9154349d28432eb3c70c3 /drivers/pci
parent7725118815537bd481a81828fa125ee154ee74fc (diff)
PCI quirks: disable AMD/ATI legacy boot interrupt generation
Add quirks for several AMD/ATI chipsets to prevent generation of legacy boot interrupts. Integrates a separate older quirk to make IO-APIC mode work on AMD 8131 rev. A0 and B0, which was due to an AMD erratum. Signed-off-by: Olaf Dabrunz <od@suse.de> Signed-off-by: Stefan Assmann <sassmann@suse.de> Cc: Jon Masters <jonathan@jonmasters.org> Cc: Olaf Dabrunz <od@suse.de> Cc: Stefan Assmann <sassmann@suse.de> Cc: Ihno Krumreich <ihno@suse.de> Cc: Sven Dietrich <sdietrich@suse.de> Cc: Daniel Gollub <dgollub@suse.de> Cc: Felix Foerster <ffoerster@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/quirks.c71
1 files changed, 50 insertions, 21 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index d1f0281279c3..aed7c5e55dce 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -602,27 +602,6 @@ static void __init quirk_ioapic_rmw(struct pci_dev *dev)
602 sis_apic_bug = 1; 602 sis_apic_bug = 1;
603} 603}
604DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw); 604DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw);
605
606#define AMD8131_revA0 0x01
607#define AMD8131_revB0 0x11
608#define AMD8131_MISC 0x40
609#define AMD8131_NIOAMODE_BIT 0
610static void quirk_amd_8131_ioapic(struct pci_dev *dev)
611{
612 unsigned char tmp;
613
614 if (nr_ioapics == 0)
615 return;
616
617 if (dev->revision == AMD8131_revA0 || dev->revision == AMD8131_revB0) {
618 dev_info(&dev->dev, "Fixing up AMD8131 IOAPIC mode\n");
619 pci_read_config_byte( dev, AMD8131_MISC, &tmp);
620 tmp &= ~(1 << AMD8131_NIOAMODE_BIT);
621 pci_write_config_byte( dev, AMD8131_MISC, tmp);
622 }
623}
624DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
625DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_amd_8131_ioapic);
626#endif /* CONFIG_X86_IO_APIC */ 605#endif /* CONFIG_X86_IO_APIC */
627 606
628/* 607/*
@@ -1449,6 +1428,56 @@ static void quirk_disable_broadcom_boot_interrupt(struct pci_dev *dev)
1449 "0x%04x:0x%04x\n", dev->vendor, dev->device); 1428 "0x%04x:0x%04x\n", dev->vendor, dev->device);
1450} 1429}
1451DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000SB, quirk_disable_broadcom_boot_interrupt); 1430DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000SB, quirk_disable_broadcom_boot_interrupt);
1431
1432/*
1433 * disable boot interrupts on AMD and ATI chipsets
1434 */
1435/*
1436 * NOIOAMODE needs to be disabled to disable "boot interrupts". For AMD 8131
1437 * rev. A0 and B0, NOIOAMODE needs to be disabled anyway to fix IO-APIC mode
1438 * (due to an erratum).
1439 */
1440#define AMD_813X_MISC 0x40
1441#define AMD_813X_NOIOAMODE (1<<0)
1442
1443static void quirk_disable_amd_813x_boot_interrupt(struct pci_dev *dev)
1444{
1445 u32 pci_config_dword;
1446
1447 if (noioapicquirk)
1448 return;
1449
1450 pci_read_config_dword(dev, AMD_813X_MISC, &pci_config_dword);
1451 pci_config_dword &= ~AMD_813X_NOIOAMODE;
1452 pci_write_config_dword(dev, AMD_813X_MISC, pci_config_dword);
1453
1454 printk(KERN_INFO "disabled boot interrupts on PCI device "
1455 "0x%04x:0x%04x\n", dev->vendor, dev->device);
1456}
1457DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
1458DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8132_BRIDGE, quirk_disable_amd_813x_boot_interrupt);
1459
1460#define AMD_8111_PCI_IRQ_ROUTING 0x56
1461
1462static void quirk_disable_amd_8111_boot_interrupt(struct pci_dev *dev)
1463{
1464 u16 pci_config_word;
1465
1466 if (noioapicquirk)
1467 return;
1468
1469 pci_read_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, &pci_config_word);
1470 if (!pci_config_word) {
1471 printk(KERN_INFO "boot interrupts on PCI device 0x%04x:0x%04x "
1472 "already disabled\n",
1473 dev->vendor, dev->device);
1474 return;
1475 }
1476 pci_write_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, 0);
1477 printk(KERN_INFO "disabled boot interrupts on PCI device "
1478 "0x%04x:0x%04x\n", dev->vendor, dev->device);
1479}
1480DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, quirk_disable_amd_8111_boot_interrupt);
1452#endif /* CONFIG_X86_IO_APIC */ 1481#endif /* CONFIG_X86_IO_APIC */
1453 1482
1454/* 1483/*