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authorYinghai Lu <yinghai@kernel.org>2012-02-10 18:33:48 -0500
committerJesse Barnes <jbarnes@virtuousgeek.org>2012-02-23 15:00:04 -0500
commit3796f1e2ca38deebd30aa755ea52562b6926c73e (patch)
tree8343152f81995af76c68cd253e75886f2724cae9 /drivers/pci
parent1184893439b1a7532b579a85a354db12bbf1b277 (diff)
PCI: Skip cardbus assigned resource reset during pci bus rescan
Otherwise when rescan is used for cardbus, assigned resources will get cleared. Signed-off-by: Yinghai Lu <yinghai@kernel.org> Tested-by: Dominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/setup-bus.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 3b3932a6465f..2991a8975064 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -901,6 +901,8 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
901 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2; 901 resource_size_t b_res_3_size = pci_cardbus_mem_size * 2;
902 u16 ctrl; 902 u16 ctrl;
903 903
904 if (b_res[0].parent)
905 goto handle_b_res_1;
904 /* 906 /*
905 * Reserve some resources for CardBus. We reserve 907 * Reserve some resources for CardBus. We reserve
906 * a fixed amount of bus space for CardBus bridges. 908 * a fixed amount of bus space for CardBus bridges.
@@ -914,6 +916,9 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
914 pci_cardbus_io_size); 916 pci_cardbus_io_size);
915 } 917 }
916 918
919handle_b_res_1:
920 if (b_res[1].parent)
921 goto handle_b_res_2;
917 b_res[1].start = pci_cardbus_io_size; 922 b_res[1].start = pci_cardbus_io_size;
918 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1; 923 b_res[1].end = b_res[1].start + pci_cardbus_io_size - 1;
919 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN; 924 b_res[1].flags |= IORESOURCE_IO | IORESOURCE_STARTALIGN;
@@ -923,6 +928,7 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
923 pci_cardbus_io_size); 928 pci_cardbus_io_size);
924 } 929 }
925 930
931handle_b_res_2:
926 /* MEM1 must not be pref mmio */ 932 /* MEM1 must not be pref mmio */
927 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); 933 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
928 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) { 934 if (ctrl & PCI_CB_BRIDGE_CTL_PREFETCH_MEM1) {
@@ -942,6 +948,8 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
942 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl); 948 pci_read_config_word(bridge, PCI_CB_BRIDGE_CONTROL, &ctrl);
943 } 949 }
944 950
951 if (b_res[2].parent)
952 goto handle_b_res_3;
945 /* 953 /*
946 * If we have prefetchable memory support, allocate 954 * If we have prefetchable memory support, allocate
947 * two regions. Otherwise, allocate one region of 955 * two regions. Otherwise, allocate one region of
@@ -962,6 +970,9 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
962 b_res_3_size = pci_cardbus_mem_size; 970 b_res_3_size = pci_cardbus_mem_size;
963 } 971 }
964 972
973handle_b_res_3:
974 if (b_res[3].parent)
975 goto handle_done;
965 b_res[3].start = pci_cardbus_mem_size; 976 b_res[3].start = pci_cardbus_mem_size;
966 b_res[3].end = b_res[3].start + b_res_3_size - 1; 977 b_res[3].end = b_res[3].start + b_res_3_size - 1;
967 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN; 978 b_res[3].flags |= IORESOURCE_MEM | IORESOURCE_STARTALIGN;
@@ -970,6 +981,9 @@ static void pci_bus_size_cardbus(struct pci_bus *bus,
970 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size, 981 add_to_list(realloc_head, bridge, b_res+3, b_res_3_size,
971 pci_cardbus_mem_size); 982 pci_cardbus_mem_size);
972 } 983 }
984
985handle_done:
986 ;
973} 987}
974 988
975void __ref __pci_bus_size_bridges(struct pci_bus *bus, 989void __ref __pci_bus_size_bridges(struct pci_bus *bus,