aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci
diff options
context:
space:
mode:
authorBjorn Helgaas <bhelgaas@google.com>2012-09-13 10:41:01 -0400
committerBjorn Helgaas <bhelgaas@google.com>2012-09-13 10:41:01 -0400
commit78890b5989d96ddce989cde929c45ceeded0fcaf (patch)
tree4e2da81fc7c97f11aee174b1eedac110c9a68b3a /drivers/pci
parent1959ec5f82acbdf91425b41600f119ebecb5f6a8 (diff)
parent55d512e245bc7699a8800e23df1a24195dd08217 (diff)
Merge commit 'v3.6-rc5' into next
* commit 'v3.6-rc5': (1098 commits) Linux 3.6-rc5 HID: tpkbd: work even if the new Lenovo Keyboard driver is not configured Remove user-triggerable BUG from mpol_to_str xen/pciback: Fix proper FLR steps. uml: fix compile error in deliver_alarm() dj: memory scribble in logi_dj Fix order of arguments to compat_put_time[spec|val] xen: Use correct masking in xen_swiotlb_alloc_coherent. xen: fix logical error in tlb flushing xen/p2m: Fix one-off error in checking the P2M tree directory. powerpc: Don't use __put_user() in patch_instruction powerpc: Make sure IPI handlers see data written by IPI senders powerpc: Restore correct DSCR in context switch powerpc: Fix DSCR inheritance in copy_thread() powerpc: Keep thread.dscr and thread.dscr_inherit in sync powerpc: Update DSCR on all CPUs when writing sysfs dscr_default powerpc/powernv: Always go into nap mode when CPU is offline powerpc: Give hypervisor decrementer interrupts their own handler powerpc/vphn: Fix arch_update_cpu_topology() return value ARM: gemini: fix the gemini build ... Conflicts: drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c drivers/rapidio/devices/tsi721.c
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pci-acpi.c4
-rw-r--r--drivers/pci/pci-driver.c13
-rw-r--r--drivers/pci/pci-sysfs.c42
-rw-r--r--drivers/pci/pci.c1
-rw-r--r--drivers/pci/pcie/portdrv_pci.c14
-rw-r--r--drivers/pci/probe.c31
6 files changed, 89 insertions, 16 deletions
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index fbf7b26c7c8a..c5792d622dc4 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -266,8 +266,8 @@ static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
266 } 266 }
267 267
268 if (!error) 268 if (!error)
269 dev_printk(KERN_INFO, &dev->dev, 269 dev_info(&dev->dev, "power state changed by ACPI to %s\n",
270 "power state changed by ACPI to D%d\n", state); 270 pci_power_name(state));
271 271
272 return error; 272 return error;
273} 273}
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 185be3703343..d6fd6b6d9d4b 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -280,8 +280,12 @@ static long local_pci_probe(void *_ddi)
280{ 280{
281 struct drv_dev_and_id *ddi = _ddi; 281 struct drv_dev_and_id *ddi = _ddi;
282 struct device *dev = &ddi->dev->dev; 282 struct device *dev = &ddi->dev->dev;
283 struct device *parent = dev->parent;
283 int rc; 284 int rc;
284 285
286 /* The parent bridge must be in active state when probing */
287 if (parent)
288 pm_runtime_get_sync(parent);
285 /* Unbound PCI devices are always set to disabled and suspended. 289 /* Unbound PCI devices are always set to disabled and suspended.
286 * During probe, the device is set to enabled and active and the 290 * During probe, the device is set to enabled and active and the
287 * usage count is incremented. If the driver supports runtime PM, 291 * usage count is incremented. If the driver supports runtime PM,
@@ -298,6 +302,8 @@ static long local_pci_probe(void *_ddi)
298 pm_runtime_set_suspended(dev); 302 pm_runtime_set_suspended(dev);
299 pm_runtime_put_noidle(dev); 303 pm_runtime_put_noidle(dev);
300 } 304 }
305 if (parent)
306 pm_runtime_put(parent);
301 return rc; 307 return rc;
302} 308}
303 309
@@ -959,6 +965,13 @@ static int pci_pm_poweroff_noirq(struct device *dev)
959 if (!pci_dev->state_saved && !pci_is_bridge(pci_dev)) 965 if (!pci_dev->state_saved && !pci_is_bridge(pci_dev))
960 pci_prepare_to_sleep(pci_dev); 966 pci_prepare_to_sleep(pci_dev);
961 967
968 /*
969 * The reason for doing this here is the same as for the analogous code
970 * in pci_pm_suspend_noirq().
971 */
972 if (pci_dev->class == PCI_CLASS_SERIAL_USB_EHCI)
973 pci_write_config_word(pci_dev, PCI_COMMAND, 0);
974
962 return 0; 975 return 0;
963} 976}
964 977
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 6869009c7393..02d107b15281 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -458,6 +458,40 @@ boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
458} 458}
459struct device_attribute vga_attr = __ATTR_RO(boot_vga); 459struct device_attribute vga_attr = __ATTR_RO(boot_vga);
460 460
461static void
462pci_config_pm_runtime_get(struct pci_dev *pdev)
463{
464 struct device *dev = &pdev->dev;
465 struct device *parent = dev->parent;
466
467 if (parent)
468 pm_runtime_get_sync(parent);
469 pm_runtime_get_noresume(dev);
470 /*
471 * pdev->current_state is set to PCI_D3cold during suspending,
472 * so wait until suspending completes
473 */
474 pm_runtime_barrier(dev);
475 /*
476 * Only need to resume devices in D3cold, because config
477 * registers are still accessible for devices suspended but
478 * not in D3cold.
479 */
480 if (pdev->current_state == PCI_D3cold)
481 pm_runtime_resume(dev);
482}
483
484static void
485pci_config_pm_runtime_put(struct pci_dev *pdev)
486{
487 struct device *dev = &pdev->dev;
488 struct device *parent = dev->parent;
489
490 pm_runtime_put(dev);
491 if (parent)
492 pm_runtime_put_sync(parent);
493}
494
461static ssize_t 495static ssize_t
462pci_read_config(struct file *filp, struct kobject *kobj, 496pci_read_config(struct file *filp, struct kobject *kobj,
463 struct bin_attribute *bin_attr, 497 struct bin_attribute *bin_attr,
@@ -484,6 +518,8 @@ pci_read_config(struct file *filp, struct kobject *kobj,
484 size = count; 518 size = count;
485 } 519 }
486 520
521 pci_config_pm_runtime_get(dev);
522
487 if ((off & 1) && size) { 523 if ((off & 1) && size) {
488 u8 val; 524 u8 val;
489 pci_user_read_config_byte(dev, off, &val); 525 pci_user_read_config_byte(dev, off, &val);
@@ -529,6 +565,8 @@ pci_read_config(struct file *filp, struct kobject *kobj,
529 --size; 565 --size;
530 } 566 }
531 567
568 pci_config_pm_runtime_put(dev);
569
532 return count; 570 return count;
533} 571}
534 572
@@ -549,6 +587,8 @@ pci_write_config(struct file* filp, struct kobject *kobj,
549 count = size; 587 count = size;
550 } 588 }
551 589
590 pci_config_pm_runtime_get(dev);
591
552 if ((off & 1) && size) { 592 if ((off & 1) && size) {
553 pci_user_write_config_byte(dev, off, data[off - init_off]); 593 pci_user_write_config_byte(dev, off, data[off - init_off]);
554 off++; 594 off++;
@@ -587,6 +627,8 @@ pci_write_config(struct file* filp, struct kobject *kobj,
587 --size; 627 --size;
588 } 628 }
589 629
630 pci_config_pm_runtime_put(dev);
631
590 return count; 632 return count;
591} 633}
592 634
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 5ba60dd71faa..028bbc219859 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -1889,6 +1889,7 @@ void pci_pm_init(struct pci_dev *dev)
1889 dev->pm_cap = pm; 1889 dev->pm_cap = pm;
1890 dev->d3_delay = PCI_PM_D3_WAIT; 1890 dev->d3_delay = PCI_PM_D3_WAIT;
1891 dev->d3cold_delay = PCI_PM_D3COLD_WAIT; 1891 dev->d3cold_delay = PCI_PM_D3COLD_WAIT;
1892 dev->d3cold_allowed = true;
1892 1893
1893 dev->d1_support = false; 1894 dev->d1_support = false;
1894 dev->d2_support = false; 1895 dev->d2_support = false;
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index ca10911ee0df..0761d90ca279 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -133,9 +133,17 @@ static int pcie_port_runtime_resume(struct device *dev)
133{ 133{
134 return 0; 134 return 0;
135} 135}
136
137static int pcie_port_runtime_idle(struct device *dev)
138{
139 /* Delay for a short while to prevent too frequent suspend/resume */
140 pm_schedule_suspend(dev, 10);
141 return -EBUSY;
142}
136#else 143#else
137#define pcie_port_runtime_suspend NULL 144#define pcie_port_runtime_suspend NULL
138#define pcie_port_runtime_resume NULL 145#define pcie_port_runtime_resume NULL
146#define pcie_port_runtime_idle NULL
139#endif 147#endif
140 148
141static const struct dev_pm_ops pcie_portdrv_pm_ops = { 149static const struct dev_pm_ops pcie_portdrv_pm_ops = {
@@ -148,6 +156,7 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = {
148 .resume_noirq = pcie_port_resume_noirq, 156 .resume_noirq = pcie_port_resume_noirq,
149 .runtime_suspend = pcie_port_runtime_suspend, 157 .runtime_suspend = pcie_port_runtime_suspend,
150 .runtime_resume = pcie_port_runtime_resume, 158 .runtime_resume = pcie_port_runtime_resume,
159 .runtime_idle = pcie_port_runtime_idle,
151}; 160};
152 161
153#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops) 162#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
@@ -193,6 +202,11 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
193 return status; 202 return status;
194 203
195 pci_save_state(dev); 204 pci_save_state(dev);
205 /*
206 * D3cold may not work properly on some PCIe port, so disable
207 * it by default.
208 */
209 dev->d3cold_allowed = false;
196 if (!pci_match_id(port_runtime_pm_black_list, dev)) 210 if (!pci_match_id(port_runtime_pm_black_list, dev))
197 pm_runtime_put_noidle(&dev->dev); 211 pm_runtime_put_noidle(&dev->dev);
198 212
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index d8f513bdf95c..3cdba8b3f816 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -144,15 +144,13 @@ static inline unsigned long decode_bar(struct pci_dev *dev, u32 bar)
144 case PCI_BASE_ADDRESS_MEM_TYPE_32: 144 case PCI_BASE_ADDRESS_MEM_TYPE_32:
145 break; 145 break;
146 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 146 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
147 dev_info(&dev->dev, "1M mem BAR treated as 32-bit BAR\n"); 147 /* 1M mem BAR treated as 32-bit BAR */
148 break; 148 break;
149 case PCI_BASE_ADDRESS_MEM_TYPE_64: 149 case PCI_BASE_ADDRESS_MEM_TYPE_64:
150 flags |= IORESOURCE_MEM_64; 150 flags |= IORESOURCE_MEM_64;
151 break; 151 break;
152 default: 152 default:
153 dev_warn(&dev->dev, 153 /* mem unknown type treated as 32-bit BAR */
154 "mem unknown type %x treated as 32-bit BAR\n",
155 mem_type);
156 break; 154 break;
157 } 155 }
158 return flags; 156 return flags;
@@ -173,9 +171,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
173 u32 l, sz, mask; 171 u32 l, sz, mask;
174 u16 orig_cmd; 172 u16 orig_cmd;
175 struct pci_bus_region region; 173 struct pci_bus_region region;
174 bool bar_too_big = false, bar_disabled = false;
176 175
177 mask = type ? PCI_ROM_ADDRESS_MASK : ~0; 176 mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
178 177
178 /* No printks while decoding is disabled! */
179 if (!dev->mmio_always_on) { 179 if (!dev->mmio_always_on) {
180 pci_read_config_word(dev, PCI_COMMAND, &orig_cmd); 180 pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);
181 pci_write_config_word(dev, PCI_COMMAND, 181 pci_write_config_word(dev, PCI_COMMAND,
@@ -240,8 +240,7 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
240 goto fail; 240 goto fail;
241 241
242 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) { 242 if ((sizeof(resource_size_t) < 8) && (sz64 > 0x100000000ULL)) {
243 dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", 243 bar_too_big = true;
244 pos);
245 goto fail; 244 goto fail;
246 } 245 }
247 246
@@ -252,12 +251,11 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
252 region.start = 0; 251 region.start = 0;
253 region.end = sz64; 252 region.end = sz64;
254 pcibios_bus_to_resource(dev, res, &region); 253 pcibios_bus_to_resource(dev, res, &region);
254 bar_disabled = true;
255 } else { 255 } else {
256 region.start = l64; 256 region.start = l64;
257 region.end = l64 + sz64; 257 region.end = l64 + sz64;
258 pcibios_bus_to_resource(dev, res, &region); 258 pcibios_bus_to_resource(dev, res, &region);
259 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n",
260 pos, res);
261 } 259 }
262 } else { 260 } else {
263 sz = pci_size(l, sz, mask); 261 sz = pci_size(l, sz, mask);
@@ -268,18 +266,23 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
268 region.start = l; 266 region.start = l;
269 region.end = l + sz; 267 region.end = l + sz;
270 pcibios_bus_to_resource(dev, res, &region); 268 pcibios_bus_to_resource(dev, res, &region);
271
272 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
273 } 269 }
274 270
275 out: 271 goto out;
272
273
274fail:
275 res->flags = 0;
276out:
276 if (!dev->mmio_always_on) 277 if (!dev->mmio_always_on)
277 pci_write_config_word(dev, PCI_COMMAND, orig_cmd); 278 pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
278 279
280 if (bar_too_big)
281 dev_err(&dev->dev, "reg %x: can't handle 64-bit BAR\n", pos);
282 if (res->flags && !bar_disabled)
283 dev_printk(KERN_DEBUG, &dev->dev, "reg %x: %pR\n", pos, res);
284
279 return (res->flags & IORESOURCE_MEM_64) ? 1 : 0; 285 return (res->flags & IORESOURCE_MEM_64) ? 1 : 0;
280 fail:
281 res->flags = 0;
282 goto out;
283} 286}
284 287
285static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom) 288static void pci_read_bases(struct pci_dev *dev, unsigned int howmany, int rom)