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authorMark Brown <broonie@opensource.wolfsonmicro.com>2010-12-13 10:53:31 -0500
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-12-13 10:53:31 -0500
commit474b9c86b0c65e9ca6a77d8b7bf132c4d5993b9c (patch)
tree9ce213f7a268d13f8871b84f1d22c2b9ff55afcf /drivers/pci/quirks.c
parent49db7e7b995f5c61c5e24198f833ed01d99f5e7d (diff)
parentfdea0571ddca8e3f22448f66d72a034575abea28 (diff)
Merge branch 'topic/asoc' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6 into for-2.6.38
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c18
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index f5c63fe9db5c..6f9350cabbd5 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2136,6 +2136,24 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82865_HB,
2136DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82875_HB, 2136DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82875_HB,
2137 quirk_unhide_mch_dev6); 2137 quirk_unhide_mch_dev6);
2138 2138
2139#ifdef CONFIG_TILE
2140/*
2141 * The Tilera TILEmpower platform needs to set the link speed
2142 * to 2.5GT(Giga-Transfers)/s (Gen 1). The default link speed
2143 * setting is 5GT/s (Gen 2). 0x98 is the Link Control2 PCIe
2144 * capability register of the PEX8624 PCIe switch. The switch
2145 * supports link speed auto negotiation, but falsely sets
2146 * the link speed to 5GT/s.
2147 */
2148static void __devinit quirk_tile_plx_gen1(struct pci_dev *dev)
2149{
2150 if (tile_plx_gen1) {
2151 pci_write_config_dword(dev, 0x98, 0x1);
2152 mdelay(50);
2153 }
2154}
2155DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8624, quirk_tile_plx_gen1);
2156#endif /* CONFIG_TILE */
2139 2157
2140#ifdef CONFIG_PCI_MSI 2158#ifdef CONFIG_PCI_MSI
2141/* Some chipsets do not support MSI. We cannot easily rely on setting 2159/* Some chipsets do not support MSI. We cannot easily rely on setting