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authorAlan Cox <alan@lxorguk.ukuu.org.uk>2006-10-03 19:41:26 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2006-12-01 17:36:56 -0500
commit368c73d4f689dae0807d0a2aa74c61fd2b9b075f (patch)
tree4887ca05d1c02521d6194f88970f7c23d8aeb4ba /drivers/pci/quirks.c
parentcc692a5f1e9816671b77da77c6d6c463156ba1c7 (diff)
PCI: quirks: fix the festering mess that claims to handle IDE quirks
The number of permutations of crap we do is amazing and almost all of it has the wrong effect in 2.6. At the heart of this is the PCI SFF magic which says that compatibility mode PCI IDE controllers use ISA IRQ routing and hard coded addresses not the BAR values. The old quirks variously clears them, sets them, adjusts them and then IDE ignores the result. In order to drive all this garbage out and to do it portably we need to handle the SFF rules directly and properly. Because we know the device BAR 0-3 are not used in compatibility mode we load them with the values that are implied (and indeed which many controllers actually thoughtfully put there in this mode anyway). This removes special cases in the IDE layer and libata which now knows that bar 0/1/2/3 always contain the correct address. It means our resource allocation map is accurate from boot, not "mostly accurate" after ide is loaded, and it shoots lots of code. There is also lots more code and magic constant knowledge to shoot once this is in and settled. Been in my test tree for a while both with drivers/ide and with libata. Wants some -mm shakedown in case I've missed something dumb or there are corner cases lurking. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c59
1 files changed, 3 insertions, 56 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 5b4483811691..9ca9b9bf6160 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -797,56 +797,6 @@ static void __init quirk_mediagx_master(struct pci_dev *dev)
797DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master ); 797DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master );
798 798
799/* 799/*
800 * As per PCI spec, ignore base address registers 0-3 of the IDE controllers
801 * running in Compatible mode (bits 0 and 2 in the ProgIf for primary and
802 * secondary channels respectively). If the device reports Compatible mode
803 * but does use BAR0-3 for address decoding, we assume that firmware has
804 * programmed these BARs with standard values (0x1f0,0x3f4 and 0x170,0x374).
805 * Exceptions (if they exist) must be handled in chip/architecture specific
806 * fixups.
807 *
808 * Note: for non x86 people. You may need an arch specific quirk to handle
809 * moving IDE devices to native mode as well. Some plug in card devices power
810 * up in compatible mode and assume the BIOS will adjust them.
811 *
812 * Q: should we load the 0x1f0,0x3f4 into the registers or zap them as
813 * we do now ? We don't want is pci_enable_device to come along
814 * and assign new resources. Both approaches work for that.
815 */
816static void __devinit quirk_ide_bases(struct pci_dev *dev)
817{
818 struct resource *res;
819 int first_bar = 2, last_bar = 0;
820
821 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
822 return;
823
824 res = &dev->resource[0];
825
826 /* primary channel: ProgIf bit 0, BAR0, BAR1 */
827 if (!(dev->class & 1) && (res[0].flags || res[1].flags)) {
828 res[0].start = res[0].end = res[0].flags = 0;
829 res[1].start = res[1].end = res[1].flags = 0;
830 first_bar = 0;
831 last_bar = 1;
832 }
833
834 /* secondary channel: ProgIf bit 2, BAR2, BAR3 */
835 if (!(dev->class & 4) && (res[2].flags || res[3].flags)) {
836 res[2].start = res[2].end = res[2].flags = 0;
837 res[3].start = res[3].end = res[3].flags = 0;
838 last_bar = 3;
839 }
840
841 if (!last_bar)
842 return;
843
844 printk(KERN_INFO "PCI: Ignoring BAR%d-%d of IDE controller %s\n",
845 first_bar, last_bar, pci_name(dev));
846}
847DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_ide_bases);
848
849/*
850 * Ensure C0 rev restreaming is off. This is normally done by 800 * Ensure C0 rev restreaming is off. This is normally done by
851 * the BIOS but in the odd case it is not the results are corruption 801 * the BIOS but in the odd case it is not the results are corruption
852 * hence the presence of a Linux check 802 * hence the presence of a Linux check
@@ -880,11 +830,10 @@ static void __devinit quirk_svwks_csb5ide(struct pci_dev *pdev)
880 prog &= ~5; 830 prog &= ~5;
881 pdev->class &= ~5; 831 pdev->class &= ~5;
882 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); 832 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
883 /* need to re-assign BARs for compat mode */ 833 /* PCI layer will sort out resources */
884 quirk_ide_bases(pdev);
885 } 834 }
886} 835}
887DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide ); 836DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide );
888 837
889/* 838/*
890 * Intel 82801CAM ICH3-M datasheet says IDE modes must be the same 839 * Intel 82801CAM ICH3-M datasheet says IDE modes must be the same
@@ -900,11 +849,9 @@ static void __init quirk_ide_samemode(struct pci_dev *pdev)
900 prog &= ~5; 849 prog &= ~5;
901 pdev->class &= ~5; 850 pdev->class &= ~5;
902 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); 851 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
903 /* need to re-assign BARs for compat mode */
904 quirk_ide_bases(pdev);
905 } 852 }
906} 853}
907DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode); 854DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode);
908 855
909/* This was originally an Alpha specific thing, but it really fits here. 856/* This was originally an Alpha specific thing, but it really fits here.
910 * The i82375 PCI/EISA bridge appears as non-classified. Fix that. 857 * The i82375 PCI/EISA bridge appears as non-classified. Fix that.