PCI: disable mmio during bar sizing

It is a known issue that mmio decoding shall be disabled while doing PCI
bar sizing. Host bridge and other devices (PCI PIC) shall be excluded for
certain platforms. This patch mainly comes from Mathew Willcox's
patch in http://kerneltrap.org/mailarchive/linux-kernel/2007/9/13/258969.

A new flag bit "mmio_alway_on" is added to pci_dev with the intention that
devices with their mmio decoding cannot be disabled during BAR sizing shall
have this bit set, preferrablly in their quirks.

Without this patch, Intel Moorestown platform graphics unit will be
corrupted during bar sizing activities.

Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

1 files changed, 10 insertions, 0 deletions

diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index f4adba2d1dd3..12625d90f8b5 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -163,9 +163,16 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
                         struct resource *res, unsigned int pos)
 {
         u32 l, sz, mask;
+        u16 orig_cmd;
 
         mask = type ? PCI_ROM_ADDRESS_MASK : ~0;
 
+        if (!dev->mmio_always_on) {
+                pci_read_config_word(dev, PCI_COMMAND, &orig_cmd);
+                pci_write_config_word(dev, PCI_COMMAND,
+                        orig_cmd & ~(PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
+        }
+
         res->name = pci_name(dev);
 
         pci_read_config_dword(dev, pos, &l);
@@ -173,6 +180,9 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
         pci_read_config_dword(dev, pos, &sz);
         pci_write_config_dword(dev, pos, l);
 
+        if (!dev->mmio_always_on)
+                pci_write_config_word(dev, PCI_COMMAND, orig_cmd);
+
         /*
          * All bits set in sz means the device isn't working properly.
          * If the BAR isn't implemented, all bits must be 0.  If it's a