diff options
author | Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> | 2010-04-15 00:09:13 -0400 |
---|---|---|
committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-05-11 15:01:12 -0400 |
commit | c6d34eddecb34fd84f9fb2ea26a63cfde5662f49 (patch) | |
tree | a80ed52485693d649158621edcd8bd2d9431d3c9 /drivers/pci/pcie | |
parent | d4dfd7278eade24c4aa4b36b8df981fab04f2f26 (diff) |
PCI: aerdrv: RsvdP of PCI_ERR_ROOT_COMMAND
Handle preserved bits properly.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pcie')
-rw-r--r-- | drivers/pci/pcie/aer/aerdrv.c | 18 | ||||
-rw-r--r-- | drivers/pci/pcie/aer/aerdrv_core.c | 10 |
2 files changed, 17 insertions, 11 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index 7a711ee314b7..4e845ab18643 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c | |||
@@ -234,13 +234,15 @@ static int __devinit aer_probe(struct pcie_device *dev) | |||
234 | static pci_ers_result_t aer_root_reset(struct pci_dev *dev) | 234 | static pci_ers_result_t aer_root_reset(struct pci_dev *dev) |
235 | { | 235 | { |
236 | u16 p2p_ctrl; | 236 | u16 p2p_ctrl; |
237 | u32 status; | 237 | u32 reg32; |
238 | int pos; | 238 | int pos; |
239 | 239 | ||
240 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | 240 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); |
241 | 241 | ||
242 | /* Disable Root's interrupt in response to error messages */ | 242 | /* Disable Root's interrupt in response to error messages */ |
243 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, 0); | 243 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, ®32); |
244 | reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; | ||
245 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); | ||
244 | 246 | ||
245 | /* Assert Secondary Bus Reset */ | 247 | /* Assert Secondary Bus Reset */ |
246 | pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl); | 248 | pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl); |
@@ -265,12 +267,14 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) | |||
265 | msleep(200); | 267 | msleep(200); |
266 | dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n"); | 268 | dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n"); |
267 | 269 | ||
270 | /* Clear Root Error Status */ | ||
271 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, ®32); | ||
272 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, reg32); | ||
273 | |||
268 | /* Enable Root Port's interrupt in response to error messages */ | 274 | /* Enable Root Port's interrupt in response to error messages */ |
269 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &status); | 275 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, ®32); |
270 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, status); | 276 | reg32 |= ROOT_PORT_INTR_ON_MESG_MASK; |
271 | pci_write_config_dword(dev, | 277 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); |
272 | pos + PCI_ERR_ROOT_COMMAND, | ||
273 | ROOT_PORT_INTR_ON_MESG_MASK); | ||
274 | 278 | ||
275 | return PCI_ERS_RESULT_RECOVERED; | 279 | return PCI_ERS_RESULT_RECOVERED; |
276 | } | 280 | } |
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index aceb04b67b60..9754a09bf20e 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c | |||
@@ -623,9 +623,9 @@ void aer_enable_rootport(struct aer_rpc *rpc) | |||
623 | set_downstream_devices_error_reporting(pdev, true); | 623 | set_downstream_devices_error_reporting(pdev, true); |
624 | 624 | ||
625 | /* Enable Root Port's interrupt in response to error messages */ | 625 | /* Enable Root Port's interrupt in response to error messages */ |
626 | pci_write_config_dword(pdev, | 626 | pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, ®32); |
627 | aer_pos + PCI_ERR_ROOT_COMMAND, | 627 | reg32 |= ROOT_PORT_INTR_ON_MESG_MASK; |
628 | ROOT_PORT_INTR_ON_MESG_MASK); | 628 | pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_COMMAND, reg32); |
629 | } | 629 | } |
630 | 630 | ||
631 | /** | 631 | /** |
@@ -648,7 +648,9 @@ static void disable_root_aer(struct aer_rpc *rpc) | |||
648 | 648 | ||
649 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); | 649 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); |
650 | /* Disable Root's interrupt in response to error messages */ | 650 | /* Disable Root's interrupt in response to error messages */ |
651 | pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, 0); | 651 | pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, ®32); |
652 | reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; | ||
653 | pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, reg32); | ||
652 | 654 | ||
653 | /* Clear Root's error status reg */ | 655 | /* Clear Root's error status reg */ |
654 | pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, ®32); | 656 | pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, ®32); |