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authorAlex Williamson <alex.williamson@redhat.com>2013-08-08 16:10:20 -0400
committerBjorn Helgaas <bhelgaas@google.com>2013-08-14 17:25:59 -0400
commit1b95ce8fc9c12fdb60047f2f9950f29e76e7c66d (patch)
treef069fc696d3cd56c4afd0ef1ae710469407aaadc /drivers/pci/pcie/aer
parentde0c548c33429cc78fd47a3c190c6d00b0e4e441 (diff)
PCI: Remove aer_do_secondary_bus_reset()
One PCI bus reset function to rule them all. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pcie/aer')
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c2
-rw-r--r--drivers/pci/pcie/aer/aerdrv.h1
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c35
3 files changed, 2 insertions, 36 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 76ef634caf6f..0bf82a20a0fb 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -352,7 +352,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
352 reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; 352 reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
353 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); 353 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
354 354
355 aer_do_secondary_bus_reset(dev); 355 pci_reset_bridge_secondary_bus(dev);
356 dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n"); 356 dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n");
357 357
358 /* Clear Root Error Status */ 358 /* Clear Root Error Status */
diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h
index 90ea3e88041f..84420b7c9456 100644
--- a/drivers/pci/pcie/aer/aerdrv.h
+++ b/drivers/pci/pcie/aer/aerdrv.h
@@ -106,7 +106,6 @@ static inline pci_ers_result_t merge_result(enum pci_ers_result orig,
106} 106}
107 107
108extern struct bus_type pcie_port_bus_type; 108extern struct bus_type pcie_port_bus_type;
109void aer_do_secondary_bus_reset(struct pci_dev *dev);
110int aer_init(struct pcie_device *dev); 109int aer_init(struct pcie_device *dev);
111void aer_isr(struct work_struct *work); 110void aer_isr(struct work_struct *work);
112void aer_print_error(struct pci_dev *dev, struct aer_err_info *info); 111void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 8b68ae59b7b6..85ca36f2136d 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -367,39 +367,6 @@ static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
367} 367}
368 368
369/** 369/**
370 * aer_do_secondary_bus_reset - perform secondary bus reset
371 * @dev: pointer to bridge's pci_dev data structure
372 *
373 * Invoked when performing link reset at Root Port or Downstream Port.
374 */
375void aer_do_secondary_bus_reset(struct pci_dev *dev)
376{
377 u16 p2p_ctrl;
378
379 /* Assert Secondary Bus Reset */
380 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
381 p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;
382 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
383
384 /*
385 * we should send hot reset message for 2ms to allow it time to
386 * propagate to all downstream ports
387 */
388 msleep(2);
389
390 /* De-assert Secondary Bus Reset */
391 p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;
392 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);
393
394 /*
395 * System software must wait for at least 100ms from the end
396 * of a reset of one or more device before it is permitted
397 * to issue Configuration Requests to those devices.
398 */
399 msleep(200);
400}
401
402/**
403 * default_reset_link - default reset function 370 * default_reset_link - default reset function
404 * @dev: pointer to pci_dev data structure 371 * @dev: pointer to pci_dev data structure
405 * 372 *
@@ -408,7 +375,7 @@ void aer_do_secondary_bus_reset(struct pci_dev *dev)
408 */ 375 */
409static pci_ers_result_t default_reset_link(struct pci_dev *dev) 376static pci_ers_result_t default_reset_link(struct pci_dev *dev)
410{ 377{
411 aer_do_secondary_bus_reset(dev); 378 pci_reset_bridge_secondary_bus(dev);
412 dev_printk(KERN_DEBUG, &dev->dev, "downstream link has been reset\n"); 379 dev_printk(KERN_DEBUG, &dev->dev, "downstream link has been reset\n");
413 return PCI_ERS_RESULT_RECOVERED; 380 return PCI_ERS_RESULT_RECOVERED;
414} 381}