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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2009-09-07 04:07:29 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-09-09 16:46:18 -0400
commitc9a918838c07cbef934c8ef818d8f0e719015c3a (patch)
treefa0978d67632a15fdd014f448ac099ab1ec8df75 /drivers/pci/pcie/aer
parentb439b1d4e3ae3c36ed94ed233119ff0d145af257 (diff)
PCI: pcie, aer: checkpatch style cleanup in pcie/aer/*
Before: drivers/pci/pcie/aer/aer_inject.c total: 4 errors, 4 warnings, 473 lines checked drivers/pci/pcie/aer/aerdrv.c total: 5 errors, 2 warnings, 333 lines checked drivers/pci/pcie/aer/aerdrv.h total: 1 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 4 errors, 3 warnings, 872 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 12 errors, 11 warnings, 248 lines checked After: drivers/pci/pcie/aer/aer_inject.c total: 0 errors, 0 warnings, 466 lines checked drivers/pci/pcie/aer/aerdrv.c total: 0 errors, 0 warnings, 335 lines checked drivers/pci/pcie/aer/aerdrv.h total: 0 errors, 0 warnings, 139 lines checked drivers/pci/pcie/aer/aerdrv_core.c total: 0 errors, 0 warnings, 869 lines checked drivers/pci/pcie/aer/aerdrv_errprint.c total: 0 errors, 10 warnings, 247 lines checked Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pcie/aer')
-rw-r--r--drivers/pci/pcie/aer/aer_inject.c25
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c22
-rw-r--r--drivers/pci/pcie/aer/aerdrv.h6
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c31
-rw-r--r--drivers/pci/pcie/aer/aerdrv_errprint.c49
5 files changed, 62 insertions, 71 deletions
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index d92ae21a59d8..62d15f652bb6 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -22,11 +22,10 @@
22#include <linux/miscdevice.h> 22#include <linux/miscdevice.h>
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/fs.h> 24#include <linux/fs.h>
25#include <asm/uaccess.h> 25#include <linux/uaccess.h>
26#include "aerdrv.h" 26#include "aerdrv.h"
27 27
28struct aer_error_inj 28struct aer_error_inj {
29{
30 u8 bus; 29 u8 bus;
31 u8 dev; 30 u8 dev;
32 u8 fn; 31 u8 fn;
@@ -38,8 +37,7 @@ struct aer_error_inj
38 u32 header_log3; 37 u32 header_log3;
39}; 38};
40 39
41struct aer_error 40struct aer_error {
42{
43 struct list_head list; 41 struct list_head list;
44 unsigned int bus; 42 unsigned int bus;
45 unsigned int devfn; 43 unsigned int devfn;
@@ -55,8 +53,7 @@ struct aer_error
55 u32 source_id; 53 u32 source_id;
56}; 54};
57 55
58struct pci_bus_ops 56struct pci_bus_ops {
59{
60 struct list_head list; 57 struct list_head list;
61 struct pci_bus *bus; 58 struct pci_bus *bus;
62 struct pci_ops *ops; 59 struct pci_ops *ops;
@@ -150,7 +147,7 @@ static u32 *find_pci_config_dword(struct aer_error *err, int where,
150 target = &err->header_log1; 147 target = &err->header_log1;
151 break; 148 break;
152 case PCI_ERR_HEADER_LOG+8: 149 case PCI_ERR_HEADER_LOG+8:
153 target = &err->header_log2; 150 target = &err->header_log2;
154 break; 151 break;
155 case PCI_ERR_HEADER_LOG+12: 152 case PCI_ERR_HEADER_LOG+12:
156 target = &err->header_log3; 153 target = &err->header_log3;
@@ -258,8 +255,7 @@ static int pci_bus_set_aer_ops(struct pci_bus *bus)
258 bus_ops = NULL; 255 bus_ops = NULL;
259out: 256out:
260 spin_unlock_irqrestore(&inject_lock, flags); 257 spin_unlock_irqrestore(&inject_lock, flags);
261 if (bus_ops) 258 kfree(bus_ops);
262 kfree(bus_ops);
263 return 0; 259 return 0;
264} 260}
265 261
@@ -401,10 +397,8 @@ static int aer_inject(struct aer_error_inj *einj)
401 else 397 else
402 ret = -EINVAL; 398 ret = -EINVAL;
403out_put: 399out_put:
404 if (err_alloc) 400 kfree(err_alloc);
405 kfree(err_alloc); 401 kfree(rperr_alloc);
406 if (rperr_alloc)
407 kfree(rperr_alloc);
408 pci_dev_put(dev); 402 pci_dev_put(dev);
409 return ret; 403 return ret;
410} 404}
@@ -458,8 +452,7 @@ static void __exit aer_inject_exit(void)
458 } 452 }
459 453
460 spin_lock_irqsave(&inject_lock, flags); 454 spin_lock_irqsave(&inject_lock, flags);
461 list_for_each_entry_safe(err, err_next, 455 list_for_each_entry_safe(err, err_next, &pci_bus_ops_list, list) {
462 &pci_bus_ops_list, list) {
463 list_del(&err->list); 456 list_del(&err->list);
464 kfree(err); 457 kfree(err);
465 } 458 }
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 4770f13b3ca1..10c0e62bd5a8 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -38,7 +38,7 @@ MODULE_AUTHOR(DRIVER_AUTHOR);
38MODULE_DESCRIPTION(DRIVER_DESC); 38MODULE_DESCRIPTION(DRIVER_DESC);
39MODULE_LICENSE("GPL"); 39MODULE_LICENSE("GPL");
40 40
41static int __devinit aer_probe (struct pcie_device *dev); 41static int __devinit aer_probe(struct pcie_device *dev);
42static void aer_remove(struct pcie_device *dev); 42static void aer_remove(struct pcie_device *dev);
43static pci_ers_result_t aer_error_detected(struct pci_dev *dev, 43static pci_ers_result_t aer_error_detected(struct pci_dev *dev,
44 enum pci_channel_state error); 44 enum pci_channel_state error);
@@ -47,7 +47,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev);
47 47
48static struct pci_error_handlers aer_error_handlers = { 48static struct pci_error_handlers aer_error_handlers = {
49 .error_detected = aer_error_detected, 49 .error_detected = aer_error_detected,
50 .resume = aer_error_resume, 50 .resume = aer_error_resume,
51}; 51};
52 52
53static struct pcie_port_service_driver aerdriver = { 53static struct pcie_port_service_driver aerdriver = {
@@ -134,12 +134,12 @@ EXPORT_SYMBOL_GPL(aer_irq);
134 * 134 *
135 * Invoked when Root Port's AER service is loaded. 135 * Invoked when Root Port's AER service is loaded.
136 **/ 136 **/
137static struct aer_rpc* aer_alloc_rpc(struct pcie_device *dev) 137static struct aer_rpc *aer_alloc_rpc(struct pcie_device *dev)
138{ 138{
139 struct aer_rpc *rpc; 139 struct aer_rpc *rpc;
140 140
141 if (!(rpc = kzalloc(sizeof(struct aer_rpc), 141 rpc = kzalloc(sizeof(struct aer_rpc), GFP_KERNEL);
142 GFP_KERNEL))) 142 if (!rpc)
143 return NULL; 143 return NULL;
144 144
145 /* 145 /*
@@ -189,26 +189,28 @@ static void aer_remove(struct pcie_device *dev)
189 * 189 *
190 * Invoked when PCI Express bus loads AER service driver. 190 * Invoked when PCI Express bus loads AER service driver.
191 **/ 191 **/
192static int __devinit aer_probe (struct pcie_device *dev) 192static int __devinit aer_probe(struct pcie_device *dev)
193{ 193{
194 int status; 194 int status;
195 struct aer_rpc *rpc; 195 struct aer_rpc *rpc;
196 struct device *device = &dev->device; 196 struct device *device = &dev->device;
197 197
198 /* Init */ 198 /* Init */
199 if ((status = aer_init(dev))) 199 status = aer_init(dev);
200 if (status)
200 return status; 201 return status;
201 202
202 /* Alloc rpc data structure */ 203 /* Alloc rpc data structure */
203 if (!(rpc = aer_alloc_rpc(dev))) { 204 rpc = aer_alloc_rpc(dev);
205 if (!rpc) {
204 dev_printk(KERN_DEBUG, device, "alloc rpc failed\n"); 206 dev_printk(KERN_DEBUG, device, "alloc rpc failed\n");
205 aer_remove(dev); 207 aer_remove(dev);
206 return -ENOMEM; 208 return -ENOMEM;
207 } 209 }
208 210
209 /* Request IRQ ISR */ 211 /* Request IRQ ISR */
210 if ((status = request_irq(dev->irq, aer_irq, IRQF_SHARED, "aerdrv", 212 status = request_irq(dev->irq, aer_irq, IRQF_SHARED, "aerdrv", dev);
211 dev))) { 213 if (status) {
212 dev_printk(KERN_DEBUG, device, "request IRQ failed\n"); 214 dev_printk(KERN_DEBUG, device, "request IRQ failed\n");
213 aer_remove(dev); 215 aer_remove(dev);
214 return status; 216 return status;
diff --git a/drivers/pci/pcie/aer/aerdrv.h b/drivers/pci/pcie/aer/aerdrv.h
index bbd7428ca2d0..820ea73d25f7 100644
--- a/drivers/pci/pcie/aer/aerdrv.h
+++ b/drivers/pci/pcie/aer/aerdrv.h
@@ -21,7 +21,7 @@
21#define AER_ERROR(d) (d & AER_ERROR_MASK) 21#define AER_ERROR(d) (d & AER_ERROR_MASK)
22 22
23/* Root Error Status Register Bits */ 23/* Root Error Status Register Bits */
24#define ROOT_ERR_STATUS_MASKS 0x0f 24#define ROOT_ERR_STATUS_MASKS 0x0f
25 25
26#define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \ 26#define SYSTEM_ERROR_INTR_ON_MESG_MASK (PCI_EXP_RTCTL_SECEE| \
27 PCI_EXP_RTCTL_SENFEE| \ 27 PCI_EXP_RTCTL_SENFEE| \
@@ -65,7 +65,7 @@ struct aer_err_info {
65 int severity; /* 0:NONFATAL | 1:FATAL | 2:COR */ 65 int severity; /* 0:NONFATAL | 1:FATAL | 2:COR */
66 int flags; 66 int flags;
67 unsigned int status; /* COR/UNCOR Error Status */ 67 unsigned int status; /* COR/UNCOR Error Status */
68 struct header_log_regs tlp; /* TLP Header */ 68 struct header_log_regs tlp; /* TLP Header */
69}; 69};
70 70
71struct aer_err_source { 71struct aer_err_source {
@@ -136,4 +136,4 @@ static inline int aer_osc_setup(struct pcie_device *pciedev)
136} 136}
137#endif 137#endif
138 138
139#endif //_AERDRV_H_ 139#endif /* _AERDRV_H_ */
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index 3d8872704a58..d3f6df40b0d3 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -49,10 +49,11 @@ int pci_enable_pcie_error_reporting(struct pci_dev *dev)
49 PCI_EXP_DEVCTL_NFERE | 49 PCI_EXP_DEVCTL_NFERE |
50 PCI_EXP_DEVCTL_FERE | 50 PCI_EXP_DEVCTL_FERE |
51 PCI_EXP_DEVCTL_URRE; 51 PCI_EXP_DEVCTL_URRE;
52 pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, 52 pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, reg16);
53 reg16); 53
54 return 0; 54 return 0;
55} 55}
56EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
56 57
57int pci_disable_pcie_error_reporting(struct pci_dev *dev) 58int pci_disable_pcie_error_reporting(struct pci_dev *dev)
58{ 59{
@@ -68,10 +69,11 @@ int pci_disable_pcie_error_reporting(struct pci_dev *dev)
68 PCI_EXP_DEVCTL_NFERE | 69 PCI_EXP_DEVCTL_NFERE |
69 PCI_EXP_DEVCTL_FERE | 70 PCI_EXP_DEVCTL_FERE |
70 PCI_EXP_DEVCTL_URRE); 71 PCI_EXP_DEVCTL_URRE);
71 pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, 72 pci_write_config_word(dev, pos+PCI_EXP_DEVCTL, reg16);
72 reg16); 73
73 return 0; 74 return 0;
74} 75}
76EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
75 77
76int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev) 78int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
77{ 79{
@@ -92,6 +94,7 @@ int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
92 94
93 return 0; 95 return 0;
94} 96}
97EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
95 98
96#if 0 99#if 0
97int pci_cleanup_aer_correct_error_status(struct pci_dev *dev) 100int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
@@ -110,7 +113,6 @@ int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
110} 113}
111#endif /* 0 */ 114#endif /* 0 */
112 115
113
114static int set_device_error_reporting(struct pci_dev *dev, void *data) 116static int set_device_error_reporting(struct pci_dev *dev, void *data)
115{ 117{
116 bool enable = *((bool *)data); 118 bool enable = *((bool *)data);
@@ -164,8 +166,9 @@ static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
164 e_info->dev[e_info->error_dev_num] = dev; 166 e_info->dev[e_info->error_dev_num] = dev;
165 e_info->error_dev_num++; 167 e_info->error_dev_num++;
166 return 1; 168 return 1;
167 } else 169 }
168 return 0; 170
171 return 0;
169} 172}
170 173
171 174
@@ -411,8 +414,7 @@ static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
411 pci_cleanup_aer_uncorrect_error_status(dev); 414 pci_cleanup_aer_uncorrect_error_status(dev);
412 dev->error_state = pci_channel_io_normal; 415 dev->error_state = pci_channel_io_normal;
413 } 416 }
414 } 417 } else {
415 else {
416 /* 418 /*
417 * If the error is reported by an end point, we think this 419 * If the error is reported by an end point, we think this
418 * error is related to the upstream link of the end point. 420 * error is related to the upstream link of the end point.
@@ -473,7 +475,7 @@ static pci_ers_result_t reset_link(struct pcie_device *aerdev,
473 if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) 475 if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)
474 udev = dev; 476 udev = dev;
475 else 477 else
476 udev= dev->bus->self; 478 udev = dev->bus->self;
477 479
478 data.is_downstream = 0; 480 data.is_downstream = 0;
479 data.aer_driver = NULL; 481 data.aer_driver = NULL;
@@ -576,7 +578,7 @@ static pci_ers_result_t do_recovery(struct pcie_device *aerdev,
576 * 578 *
577 * Invoked when an error being detected by Root Port. 579 * Invoked when an error being detected by Root Port.
578 */ 580 */
579static void handle_error_source(struct pcie_device * aerdev, 581static void handle_error_source(struct pcie_device *aerdev,
580 struct pci_dev *dev, 582 struct pci_dev *dev,
581 struct aer_err_info *info) 583 struct aer_err_info *info)
582{ 584{
@@ -682,7 +684,7 @@ static void disable_root_aer(struct aer_rpc *rpc)
682 * 684 *
683 * Invoked by DPC handler to consume an error. 685 * Invoked by DPC handler to consume an error.
684 */ 686 */
685static struct aer_err_source* get_e_source(struct aer_rpc *rpc) 687static struct aer_err_source *get_e_source(struct aer_rpc *rpc)
686{ 688{
687 struct aer_err_source *e_source; 689 struct aer_err_source *e_source;
688 unsigned long flags; 690 unsigned long flags;
@@ -865,8 +867,3 @@ int aer_init(struct pcie_device *dev)
865 867
866 return AER_SUCCESS; 868 return AER_SUCCESS;
867} 869}
868
869EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
870EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
871EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);
872
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 0fc29ae80df8..ccaeceb32da3 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -33,7 +33,7 @@
33#define AER_AGENT_COMPLETER_MASK PCI_ERR_UNC_COMP_ABORT 33#define AER_AGENT_COMPLETER_MASK PCI_ERR_UNC_COMP_ABORT
34 34
35#define AER_AGENT_TRANSMITTER_MASK(t, e) (e & (PCI_ERR_COR_REP_ROLL| \ 35#define AER_AGENT_TRANSMITTER_MASK(t, e) (e & (PCI_ERR_COR_REP_ROLL| \
36 ((t == AER_CORRECTABLE) ? PCI_ERR_COR_REP_TIMER: 0))) 36 ((t == AER_CORRECTABLE) ? PCI_ERR_COR_REP_TIMER : 0)))
37 37
38#define AER_GET_AGENT(t, e) \ 38#define AER_GET_AGENT(t, e) \
39 ((e & AER_AGENT_COMPLETER_MASK) ? AER_AGENT_COMPLETER : \ 39 ((e & AER_AGENT_COMPLETER_MASK) ? AER_AGENT_COMPLETER : \
@@ -44,11 +44,11 @@
44#define AER_PHYSICAL_LAYER_ERROR_MASK PCI_ERR_COR_RCVR 44#define AER_PHYSICAL_LAYER_ERROR_MASK PCI_ERR_COR_RCVR
45#define AER_DATA_LINK_LAYER_ERROR_MASK(t, e) \ 45#define AER_DATA_LINK_LAYER_ERROR_MASK(t, e) \
46 (PCI_ERR_UNC_DLP| \ 46 (PCI_ERR_UNC_DLP| \
47 PCI_ERR_COR_BAD_TLP| \ 47 PCI_ERR_COR_BAD_TLP| \
48 PCI_ERR_COR_BAD_DLLP| \ 48 PCI_ERR_COR_BAD_DLLP| \
49 PCI_ERR_COR_REP_ROLL| \ 49 PCI_ERR_COR_REP_ROLL| \
50 ((t == AER_CORRECTABLE) ? \ 50 ((t == AER_CORRECTABLE) ? \
51 PCI_ERR_COR_REP_TIMER: 0)) 51 PCI_ERR_COR_REP_TIMER : 0))
52 52
53#define AER_PHYSICAL_LAYER_ERROR 0 53#define AER_PHYSICAL_LAYER_ERROR 0
54#define AER_DATA_LINK_LAYER_ERROR 1 54#define AER_DATA_LINK_LAYER_ERROR 1
@@ -58,38 +58,38 @@
58 ((e & AER_PHYSICAL_LAYER_ERROR_MASK) ? \ 58 ((e & AER_PHYSICAL_LAYER_ERROR_MASK) ? \
59 AER_PHYSICAL_LAYER_ERROR : \ 59 AER_PHYSICAL_LAYER_ERROR : \
60 (e & AER_DATA_LINK_LAYER_ERROR_MASK(t, e)) ? \ 60 (e & AER_DATA_LINK_LAYER_ERROR_MASK(t, e)) ? \
61 AER_DATA_LINK_LAYER_ERROR : \ 61 AER_DATA_LINK_LAYER_ERROR : \
62 AER_TRANSACTION_LAYER_ERROR) 62 AER_TRANSACTION_LAYER_ERROR)
63 63
64/* 64/*
65 * AER error strings 65 * AER error strings
66 */ 66 */
67static char* aer_error_severity_string[] = { 67static char *aer_error_severity_string[] = {
68 "Uncorrected (Non-Fatal)", 68 "Uncorrected (Non-Fatal)",
69 "Uncorrected (Fatal)", 69 "Uncorrected (Fatal)",
70 "Corrected" 70 "Corrected"
71}; 71};
72 72
73static char* aer_error_layer[] = { 73static char *aer_error_layer[] = {
74 "Physical Layer", 74 "Physical Layer",
75 "Data Link Layer", 75 "Data Link Layer",
76 "Transaction Layer" 76 "Transaction Layer"
77}; 77};
78static char* aer_correctable_error_string[] = { 78static char *aer_correctable_error_string[] = {
79 "Receiver Error ", /* Bit Position 0 */ 79 "Receiver Error ", /* Bit Position 0 */
80 NULL, 80 NULL,
81 NULL, 81 NULL,
82 NULL, 82 NULL,
83 NULL, 83 NULL,
84 NULL, 84 NULL,
85 "Bad TLP ", /* Bit Position 6 */ 85 "Bad TLP ", /* Bit Position 6 */
86 "Bad DLLP ", /* Bit Position 7 */ 86 "Bad DLLP ", /* Bit Position 7 */
87 "RELAY_NUM Rollover ", /* Bit Position 8 */ 87 "RELAY_NUM Rollover ", /* Bit Position 8 */
88 NULL, 88 NULL,
89 NULL, 89 NULL,
90 NULL, 90 NULL,
91 "Replay Timer Timeout ", /* Bit Position 12 */ 91 "Replay Timer Timeout ", /* Bit Position 12 */
92 "Advisory Non-Fatal ", /* Bit Position 13 */ 92 "Advisory Non-Fatal ", /* Bit Position 13 */
93 NULL, 93 NULL,
94 NULL, 94 NULL,
95 NULL, 95 NULL,
@@ -110,7 +110,7 @@ static char* aer_correctable_error_string[] = {
110 NULL, 110 NULL,
111}; 111};
112 112
113static char* aer_uncorrectable_error_string[] = { 113static char *aer_uncorrectable_error_string[] = {
114 NULL, 114 NULL,
115 NULL, 115 NULL,
116 NULL, 116 NULL,
@@ -123,10 +123,10 @@ static char* aer_uncorrectable_error_string[] = {
123 NULL, 123 NULL,
124 NULL, 124 NULL,
125 NULL, 125 NULL,
126 "Poisoned TLP ", /* Bit Position 12 */ 126 "Poisoned TLP ", /* Bit Position 12 */
127 "Flow Control Protocol ", /* Bit Position 13 */ 127 "Flow Control Protocol ", /* Bit Position 13 */
128 "Completion Timeout ", /* Bit Position 14 */ 128 "Completion Timeout ", /* Bit Position 14 */
129 "Completer Abort ", /* Bit Position 15 */ 129 "Completer Abort ", /* Bit Position 15 */
130 "Unexpected Completion ", /* Bit Position 16 */ 130 "Unexpected Completion ", /* Bit Position 16 */
131 "Receiver Overflow ", /* Bit Position 17 */ 131 "Receiver Overflow ", /* Bit Position 17 */
132 "Malformed TLP ", /* Bit Position 18 */ 132 "Malformed TLP ", /* Bit Position 18 */
@@ -145,19 +145,19 @@ static char* aer_uncorrectable_error_string[] = {
145 NULL, 145 NULL,
146}; 146};
147 147
148static char* aer_agent_string[] = { 148static char *aer_agent_string[] = {
149 "Receiver ID", 149 "Receiver ID",
150 "Requester ID", 150 "Requester ID",
151 "Completer ID", 151 "Completer ID",
152 "Transmitter ID" 152 "Transmitter ID"
153}; 153};
154 154
155static char * aer_get_error_source_name(int severity, 155static char *aer_get_error_source_name(int severity,
156 unsigned int status, 156 unsigned int status,
157 char errmsg_buff[]) 157 char errmsg_buff[])
158{ 158{
159 int i; 159 int i;
160 char * errmsg = NULL; 160 char *errmsg = NULL;
161 161
162 for (i = 0; i < 32; i++) { 162 for (i = 0; i < 32; i++) {
163 if (!(status & (1 << i))) 163 if (!(status & (1 << i)))
@@ -183,9 +183,9 @@ static DEFINE_SPINLOCK(logbuf_lock);
183static char errmsg_buff[100]; 183static char errmsg_buff[100];
184void aer_print_error(struct pci_dev *dev, struct aer_err_info *info) 184void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
185{ 185{
186 char * errmsg; 186 char *errmsg;
187 int err_layer, agent; 187 int err_layer, agent;
188 char * loglevel; 188 char *loglevel;
189 189
190 if (info->severity == AER_CORRECTABLE) 190 if (info->severity == AER_CORRECTABLE)
191 loglevel = KERN_WARNING; 191 loglevel = KERN_WARNING;
@@ -196,7 +196,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
196 printk("%sError Severity\t\t: %s\n", loglevel, 196 printk("%sError Severity\t\t: %s\n", loglevel,
197 aer_error_severity_string[info->severity]); 197 aer_error_severity_string[info->severity]);
198 198
199 if ( info->status == 0) { 199 if (info->status == 0) {
200 printk("%sPCIE Bus Error type\t: (Unaccessible)\n", loglevel); 200 printk("%sPCIE Bus Error type\t: (Unaccessible)\n", loglevel);
201 printk("%sUnaccessible Received\t: %s\n", loglevel, 201 printk("%sUnaccessible Received\t: %s\n", loglevel,
202 info->flags & AER_MULTI_ERROR_VALID_FLAG ? 202 info->flags & AER_MULTI_ERROR_VALID_FLAG ?
@@ -245,4 +245,3 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
245 } 245 }
246 } 246 }
247} 247}
248