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authorJiang Liu <jiang.liu@huawei.com>2012-07-24 05:20:11 -0400
committerBjorn Helgaas <bhelgaas@google.com>2012-08-23 12:11:11 -0400
commit43bd4ee89f748111d2a0443e6ef58f08ceb359aa (patch)
tree0daf4db59ab1b78dc17982a7742d84be64c1610b /drivers/pci/pcie/aer/aerdrv.c
parent263e54b99eb8f77be9b2144c5e466e95847c888c (diff)
PCI/AER: Use PCI Express Capability accessors
Use PCI Express Capability access functions to simplify PCIe AER. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pcie/aer/aerdrv.c')
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c17
1 files changed, 7 insertions, 10 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index f7c62453ae00..c78778fc0cba 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -122,19 +122,17 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
122static void aer_enable_rootport(struct aer_rpc *rpc) 122static void aer_enable_rootport(struct aer_rpc *rpc)
123{ 123{
124 struct pci_dev *pdev = rpc->rpd->port; 124 struct pci_dev *pdev = rpc->rpd->port;
125 int pos, aer_pos; 125 int aer_pos;
126 u16 reg16; 126 u16 reg16;
127 u32 reg32; 127 u32 reg32;
128 128
129 pos = pci_pcie_cap(pdev);
130 /* Clear PCIe Capability's Device Status */ 129 /* Clear PCIe Capability's Device Status */
131 pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16); 130 pcie_capability_read_word(pdev, PCI_EXP_DEVSTA, &reg16);
132 pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16); 131 pcie_capability_write_word(pdev, PCI_EXP_DEVSTA, reg16);
133 132
134 /* Disable system error generation in response to error messages */ 133 /* Disable system error generation in response to error messages */
135 pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16); 134 pcie_capability_clear_word(pdev, PCI_EXP_RTCTL,
136 reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK); 135 SYSTEM_ERROR_INTR_ON_MESG_MASK);
137 pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
138 136
139 aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR); 137 aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
140 /* Clear error status */ 138 /* Clear error status */
@@ -396,9 +394,8 @@ static void aer_error_resume(struct pci_dev *dev)
396 u16 reg16; 394 u16 reg16;
397 395
398 /* Clean up Root device status */ 396 /* Clean up Root device status */
399 pos = pci_pcie_cap(dev); 397 pcie_capability_read_word(dev, PCI_EXP_DEVSTA, &reg16);
400 pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &reg16); 398 pcie_capability_write_word(dev, PCI_EXP_DEVSTA, reg16);
401 pci_write_config_word(dev, pos + PCI_EXP_DEVSTA, reg16);
402 399
403 /* Clean AER Root Error Status */ 400 /* Clean AER Root Error Status */
404 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); 401 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);