diff options
author | Joerg Roedel <joerg.roedel@amd.com> | 2011-04-04 09:55:18 -0400 |
---|---|---|
committer | Joerg Roedel <joerg.roedel@amd.com> | 2011-04-11 03:01:41 -0400 |
commit | 5cdede2408e80f190c5595e592c24e77c1bf44b2 (patch) | |
tree | 86907de141057aa702a395d618605551240d25fe /drivers/pci/pci.h | |
parent | 7d0c5cc5be73f7ce26fdcca7b8ec2203f661eb93 (diff) |
PCI: Move ATS declarations in seperate header file
This patch moves the relevant declarations from the local
header file in drivers/pci to a more accessible locations so
that it can be used by the AMD IOMMU driver too.
The file is named pci-ats.h because support for the PCI PRI
capability will also be added there in a later patch-set.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pci.h')
-rw-r--r-- | drivers/pci/pci.h | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index a6ec200fe5ee..4020025f854e 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h | |||
@@ -250,15 +250,6 @@ struct pci_sriov { | |||
250 | u8 __iomem *mstate; /* VF Migration State Array */ | 250 | u8 __iomem *mstate; /* VF Migration State Array */ |
251 | }; | 251 | }; |
252 | 252 | ||
253 | /* Address Translation Service */ | ||
254 | struct pci_ats { | ||
255 | int pos; /* capability position */ | ||
256 | int stu; /* Smallest Translation Unit */ | ||
257 | int qdep; /* Invalidate Queue Depth */ | ||
258 | int ref_cnt; /* Physical Function reference count */ | ||
259 | unsigned int is_enabled:1; /* Enable bit is set */ | ||
260 | }; | ||
261 | |||
262 | #ifdef CONFIG_PCI_IOV | 253 | #ifdef CONFIG_PCI_IOV |
263 | extern int pci_iov_init(struct pci_dev *dev); | 254 | extern int pci_iov_init(struct pci_dev *dev); |
264 | extern void pci_iov_release(struct pci_dev *dev); | 255 | extern void pci_iov_release(struct pci_dev *dev); |
@@ -269,19 +260,6 @@ extern resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, | |||
269 | extern void pci_restore_iov_state(struct pci_dev *dev); | 260 | extern void pci_restore_iov_state(struct pci_dev *dev); |
270 | extern int pci_iov_bus_range(struct pci_bus *bus); | 261 | extern int pci_iov_bus_range(struct pci_bus *bus); |
271 | 262 | ||
272 | extern int pci_enable_ats(struct pci_dev *dev, int ps); | ||
273 | extern void pci_disable_ats(struct pci_dev *dev); | ||
274 | extern int pci_ats_queue_depth(struct pci_dev *dev); | ||
275 | /** | ||
276 | * pci_ats_enabled - query the ATS status | ||
277 | * @dev: the PCI device | ||
278 | * | ||
279 | * Returns 1 if ATS capability is enabled, or 0 if not. | ||
280 | */ | ||
281 | static inline int pci_ats_enabled(struct pci_dev *dev) | ||
282 | { | ||
283 | return dev->ats && dev->ats->is_enabled; | ||
284 | } | ||
285 | #else | 263 | #else |
286 | static inline int pci_iov_init(struct pci_dev *dev) | 264 | static inline int pci_iov_init(struct pci_dev *dev) |
287 | { | 265 | { |
@@ -304,21 +282,6 @@ static inline int pci_iov_bus_range(struct pci_bus *bus) | |||
304 | return 0; | 282 | return 0; |
305 | } | 283 | } |
306 | 284 | ||
307 | static inline int pci_enable_ats(struct pci_dev *dev, int ps) | ||
308 | { | ||
309 | return -ENODEV; | ||
310 | } | ||
311 | static inline void pci_disable_ats(struct pci_dev *dev) | ||
312 | { | ||
313 | } | ||
314 | static inline int pci_ats_queue_depth(struct pci_dev *dev) | ||
315 | { | ||
316 | return -ENODEV; | ||
317 | } | ||
318 | static inline int pci_ats_enabled(struct pci_dev *dev) | ||
319 | { | ||
320 | return 0; | ||
321 | } | ||
322 | #endif /* CONFIG_PCI_IOV */ | 285 | #endif /* CONFIG_PCI_IOV */ |
323 | 286 | ||
324 | static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, | 287 | static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, |