PCI: read-modify-write the pcie device control register when initiating pcie flr

The pcie_flr routine writes the device control register with the FLR bit
set clearing all other fields for the FLR duration. Among other fields,
the Max_Payload_Size is also cleared which can cause errors if there are
transactions lurking in the HW pipeline. The patch replaces the blank
write with read-modify-write of the control register keeping the other
fields intact.

Signed-off-by: Shmulik Ravid <shmulikr@broadcom.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>

1 files changed, 5 insertions, 3 deletions

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index be91a09c74a5..6af212c509c5 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2140,7 +2140,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
         int i;
         int pos;
         u32 cap;
-        u16 status;
+        u16 status, control;
 
         pos = pci_pcie_cap(dev);
         if (!pos)
@@ -2167,8 +2167,10 @@ static int pcie_flr(struct pci_dev *dev, int probe)
                         "proceeding with reset anyway\n");
 
 clear:
-        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
-                                PCI_EXP_DEVCTL_BCR_FLR);
+        pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &control);
+        control |= PCI_EXP_DEVCTL_BCR_FLR;
+        pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, control);
+
         msleep(100);
 
         return 0;