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authorDave Airlie <airlied@redhat.com>2010-06-01 01:32:24 -0400
committerDave Airlie <airlied@redhat.com>2011-05-03 23:38:46 -0400
commit3448a19da479b6bd1e28e2a2be9fa16c6a6feb39 (patch)
treeb69bfa9e71e46c8c7470cbdf49de8530227d6687 /drivers/pci/pci.c
parent8116188fdef5946bcbb2d73e41d7412a57ffb034 (diff)
vgaarb: use bridges to control VGA routing where possible.
So in a lot of modern systems, a GPU will always be below a parent bridge that won't share with any other GPUs. This means VGA arbitration on those GPUs can be controlled by using the bridge routing instead of io/mem decodes. The problem is locating which GPUs share which upstream bridges. This patch attempts to identify all the GPUs which can be controlled via bridges, and ones that can't. This patch endeavours to work out the bridge sharing semantics. When disabling GPUs via a bridge, it doesn't do irq callbacks or touch the io/mem decodes for the gpu. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c25
1 files changed, 14 insertions, 11 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 2472e7177b4b..a339237f4f96 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2875,31 +2875,34 @@ static int pci_set_vga_state_arch(struct pci_dev *dev, bool decode,
2875 * @dev: the PCI device 2875 * @dev: the PCI device
2876 * @decode: true = enable decoding, false = disable decoding 2876 * @decode: true = enable decoding, false = disable decoding
2877 * @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY 2877 * @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY
2878 * @change_bridge: traverse ancestors and change bridges 2878 * @change_bridge_flags: traverse ancestors and change bridges
2879 * CHANGE_BRIDGE_ONLY / CHANGE_BRIDGE
2879 */ 2880 */
2880int pci_set_vga_state(struct pci_dev *dev, bool decode, 2881int pci_set_vga_state(struct pci_dev *dev, bool decode,
2881 unsigned int command_bits, bool change_bridge) 2882 unsigned int command_bits, u32 flags)
2882{ 2883{
2883 struct pci_bus *bus; 2884 struct pci_bus *bus;
2884 struct pci_dev *bridge; 2885 struct pci_dev *bridge;
2885 u16 cmd; 2886 u16 cmd;
2886 int rc; 2887 int rc;
2887 2888
2888 WARN_ON(command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)); 2889 WARN_ON((flags & PCI_VGA_STATE_CHANGE_DECODES) & (command_bits & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY)));
2889 2890
2890 /* ARCH specific VGA enables */ 2891 /* ARCH specific VGA enables */
2891 rc = pci_set_vga_state_arch(dev, decode, command_bits, change_bridge); 2892 rc = pci_set_vga_state_arch(dev, decode, command_bits, flags);
2892 if (rc) 2893 if (rc)
2893 return rc; 2894 return rc;
2894 2895
2895 pci_read_config_word(dev, PCI_COMMAND, &cmd); 2896 if (flags & PCI_VGA_STATE_CHANGE_DECODES) {
2896 if (decode == true) 2897 pci_read_config_word(dev, PCI_COMMAND, &cmd);
2897 cmd |= command_bits; 2898 if (decode == true)
2898 else 2899 cmd |= command_bits;
2899 cmd &= ~command_bits; 2900 else
2900 pci_write_config_word(dev, PCI_COMMAND, cmd); 2901 cmd &= ~command_bits;
2902 pci_write_config_word(dev, PCI_COMMAND, cmd);
2903 }
2901 2904
2902 if (change_bridge == false) 2905 if (!(flags & PCI_VGA_STATE_CHANGE_BRIDGE))
2903 return 0; 2906 return 0;
2904 2907
2905 bus = dev->bus; 2908 bus = dev->bus;