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authorHidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>2009-04-19 21:54:59 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-06-11 15:04:06 -0400
commit67b5db6502ddd27d65dea43bf036abbd82d0dfc9 (patch)
treec48ed504f52682b88f91e82a50586013410edd7f /drivers/pci/msi.c
parent64f039d3d7f574943165b1afb72ee25caa1a9a91 (diff)
PCI MSI: Define PCI_MSI_MASK_32/64
Impact: cleanup, improve readability Define PCI_MSI_MASK_32/64 for 32/64bit devices, instead of using implicit offset (-4), "PCI_MSI_MASK_BIT - 4" and "PCI_MSI_MASK_BIT". Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> Reviewed-by: Matthew Wilcox <willy@linux.intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r--drivers/pci/msi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 362773247fbf..7ffac27d5d4a 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -381,7 +381,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
381 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ 381 entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */
382 entry->msi_attrib.pos = pos; 382 entry->msi_attrib.pos = pos;
383 383
384 entry->mask_pos = msi_mask_bits_reg(pos, entry->msi_attrib.is_64); 384 entry->mask_pos = msi_mask_reg(pos, entry->msi_attrib.is_64);
385 /* All MSIs are unmasked by default, Mask them all */ 385 /* All MSIs are unmasked by default, Mask them all */
386 if (entry->msi_attrib.maskbit) 386 if (entry->msi_attrib.maskbit)
387 pci_read_config_dword(dev, entry->mask_pos, &entry->masked); 387 pci_read_config_dword(dev, entry->mask_pos, &entry->masked);