diff options
author | Len Brown <len.brown@intel.com> | 2008-10-22 23:57:26 -0400 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2008-10-23 00:11:07 -0400 |
commit | 057316cc6a5b521b332a1d7ccc871cd60c904c74 (patch) | |
tree | 4333e608da237c73ff69b10878025cca96dcb4c8 /drivers/pci/msi.c | |
parent | 3e2dab9a1c2deb03c311eb3f83466009147ed4d3 (diff) | |
parent | 2515ddc6db8eb49a79f0fe5e67ff09ac7c81eab4 (diff) |
Merge branch 'linus' into test
Conflicts:
MAINTAINERS
arch/x86/kernel/acpi/boot.c
arch/x86/kernel/acpi/sleep.c
drivers/acpi/Kconfig
drivers/pnp/Makefile
drivers/pnp/quirks.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/pci/msi.c')
-rw-r--r-- | drivers/pci/msi.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 4a10b5624f72..d2812013fd22 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -378,23 +378,21 @@ static int msi_capability_init(struct pci_dev *dev) | |||
378 | entry->msi_attrib.masked = 1; | 378 | entry->msi_attrib.masked = 1; |
379 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ | 379 | entry->msi_attrib.default_irq = dev->irq; /* Save IOAPIC IRQ */ |
380 | entry->msi_attrib.pos = pos; | 380 | entry->msi_attrib.pos = pos; |
381 | if (is_mask_bit_support(control)) { | 381 | if (entry->msi_attrib.maskbit) { |
382 | entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos, | 382 | entry->mask_base = (void __iomem *)(long)msi_mask_bits_reg(pos, |
383 | is_64bit_address(control)); | 383 | entry->msi_attrib.is_64); |
384 | } | 384 | } |
385 | entry->dev = dev; | 385 | entry->dev = dev; |
386 | if (entry->msi_attrib.maskbit) { | 386 | if (entry->msi_attrib.maskbit) { |
387 | unsigned int maskbits, temp; | 387 | unsigned int maskbits, temp; |
388 | /* All MSIs are unmasked by default, Mask them all */ | 388 | /* All MSIs are unmasked by default, Mask them all */ |
389 | pci_read_config_dword(dev, | 389 | pci_read_config_dword(dev, |
390 | msi_mask_bits_reg(pos, is_64bit_address(control)), | 390 | msi_mask_bits_reg(pos, entry->msi_attrib.is_64), |
391 | &maskbits); | 391 | &maskbits); |
392 | temp = (1 << multi_msi_capable(control)); | 392 | temp = (1 << multi_msi_capable(control)); |
393 | temp = ((temp - 1) & ~temp); | 393 | temp = ((temp - 1) & ~temp); |
394 | maskbits |= temp; | 394 | maskbits |= temp; |
395 | pci_write_config_dword(dev, | 395 | pci_write_config_dword(dev, entry->msi_attrib.is_64, maskbits); |
396 | msi_mask_bits_reg(pos, is_64bit_address(control)), | ||
397 | maskbits); | ||
398 | entry->msi_attrib.maskbits_mask = temp; | 396 | entry->msi_attrib.maskbits_mask = temp; |
399 | } | 397 | } |
400 | list_add_tail(&entry->list, &dev->msi_list); | 398 | list_add_tail(&entry->list, &dev->msi_list); |