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authorEric W. Biederman <ebiederm@xmission.com>2006-10-04 05:16:34 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-04 10:55:27 -0400
commit38bc0361303535c86f6b67b151a541728d7bdae6 (patch)
tree6a3939b1f7aea3b00fc4ecd72646fd8442c95766 /drivers/pci/msi-apic.c
parent0366f8f7137deb072991e4c50769c6da31f8940c (diff)
[PATCH] genirq: msi: refactor the msi_ops
The current msi_ops are short sighted in a number of ways, this patch attempts to fix the glaring deficiences. - Report in msi_ops if a 64bit address is needed in the msi message, so we can fail 32bit only msi structures. - Send and receive a full struct msi_msg in both setup and target. This is a little cleaner and allows for architectures that need to modify the data to retarget the msi interrupt to a different cpu. - In target pass in the full cpu mask instead of just the first cpu in case we can make use of the full cpu mask. - Operate in terms of irqs and not vectors, currently there is still a 1-1 relationship but on architectures other than ia64 I expect this will change. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/pci/msi-apic.c')
-rw-r--r--drivers/pci/msi-apic.c36
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/pci/msi-apic.c b/drivers/pci/msi-apic.c
index 5ed798b319c7..afc0ed13aa89 100644
--- a/drivers/pci/msi-apic.c
+++ b/drivers/pci/msi-apic.c
@@ -46,37 +46,36 @@
46 46
47 47
48static void 48static void
49msi_target_apic(unsigned int vector, 49msi_target_apic(unsigned int irq, cpumask_t cpu_mask, struct msi_msg *msg)
50 unsigned int dest_cpu,
51 u32 *address_hi, /* in/out */
52 u32 *address_lo) /* in/out */
53{ 50{
54 u32 addr = *address_lo; 51 u32 addr = msg->address_lo;
55 52
56 addr &= MSI_ADDR_DESTID_MASK; 53 addr &= MSI_ADDR_DESTID_MASK;
57 addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(dest_cpu)); 54 addr |= MSI_ADDR_DESTID_CPU(cpu_physical_id(first_cpu(cpu_mask)));
58 55
59 *address_lo = addr; 56 msg->address_lo = addr;
60} 57}
61 58
62static int 59static int
63msi_setup_apic(struct pci_dev *pdev, /* unused in generic */ 60msi_setup_apic(struct pci_dev *pdev, /* unused in generic */
64 unsigned int vector, 61 unsigned int irq,
65 u32 *address_hi, 62 struct msi_msg *msg)
66 u32 *address_lo,
67 u32 *data)
68{ 63{
69 unsigned long dest_phys_id; 64 unsigned long dest_phys_id;
65 unsigned int vector;
70 66
71 dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map)); 67 dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map));
68 vector = irq;
72 69
73 *address_hi = 0; 70 msg->address_hi = 0;
74 *address_lo = MSI_ADDR_HEADER | 71 msg->address_lo =
75 MSI_ADDR_DESTMODE_PHYS | 72 MSI_ADDR_HEADER |
76 MSI_ADDR_REDIRECTION_CPU | 73 MSI_ADDR_DESTMODE_PHYS |
77 MSI_ADDR_DESTID_CPU(dest_phys_id); 74 MSI_ADDR_REDIRECTION_CPU |
75 MSI_ADDR_DESTID_CPU(dest_phys_id);
78 76
79 *data = MSI_DATA_TRIGGER_EDGE | 77 msg->data =
78 MSI_DATA_TRIGGER_EDGE |
80 MSI_DATA_LEVEL_ASSERT | 79 MSI_DATA_LEVEL_ASSERT |
81 MSI_DATA_DELIVERY_FIXED | 80 MSI_DATA_DELIVERY_FIXED |
82 MSI_DATA_VECTOR(vector); 81 MSI_DATA_VECTOR(vector);
@@ -85,7 +84,7 @@ msi_setup_apic(struct pci_dev *pdev, /* unused in generic */
85} 84}
86 85
87static void 86static void
88msi_teardown_apic(unsigned int vector) 87msi_teardown_apic(unsigned int irq)
89{ 88{
90 return; /* no-op */ 89 return; /* no-op */
91} 90}
@@ -95,6 +94,7 @@ msi_teardown_apic(unsigned int vector)
95 */ 94 */
96 95
97struct msi_ops msi_apic_ops = { 96struct msi_ops msi_apic_ops = {
97 .needs_64bit_address = 0,
98 .setup = msi_setup_apic, 98 .setup = msi_setup_apic,
99 .teardown = msi_teardown_apic, 99 .teardown = msi_teardown_apic,
100 .target = msi_target_apic, 100 .target = msi_target_apic,