intel-iommu: Tidy up iommu->gcmd handling

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

1 files changed, 4 insertions, 7 deletions

diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index f5e0ea724a6f..166959614087 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -404,7 +404,7 @@ int free_irte(int irq)
 static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
 {
         u64 addr;
-        u32 cmd, sts;
+        u32 sts;
         unsigned long flags;
 
         addr = virt_to_phys((void *)iommu->ir_table->base);
@@ -415,9 +415,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
                     (addr) | IR_X2APIC_MODE(mode) | INTR_REMAP_TABLE_REG_SIZE);
 
         /* Set interrupt-remapping table pointer */
-        cmd = iommu->gcmd | DMA_GCMD_SIRTP;
         iommu->gcmd |= DMA_GCMD_SIRTP;
-        writel(cmd, iommu->reg + DMAR_GCMD_REG);
+        writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
                       readl, (sts & DMA_GSTS_IRTPS), sts);
@@ -427,9 +426,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
                 spin_lock_irqsave(&iommu->register_lock, flags);
 
                 /* enable comaptiblity format interrupt pass through */
-                cmd = iommu->gcmd | DMA_GCMD_CFI;
                 iommu->gcmd |= DMA_GCMD_CFI;
-                writel(cmd, iommu->reg + DMAR_GCMD_REG);
+                writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
                 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
                               readl, (sts & DMA_GSTS_CFIS), sts);
@@ -446,9 +444,8 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
         spin_lock_irqsave(&iommu->register_lock, flags);
 
         /* Enable interrupt-remapping */
-        cmd = iommu->gcmd | DMA_GCMD_IRE;
         iommu->gcmd |= DMA_GCMD_IRE;
-        writel(cmd, iommu->reg + DMAR_GCMD_REG);
+        writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 
         IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
                       readl, (sts & DMA_GSTS_IRES), sts);