diff options
author | Weidong Han <weidong.han@intel.com> | 2009-04-17 04:42:14 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2009-04-19 04:21:43 -0400 |
commit | 937582382c71b75b29fbb92615629494e1a05ac0 (patch) | |
tree | e73af8d10d388fcc78d19534611db66233907a9e /drivers/pci/intr_remapping.c | |
parent | 5d0ae2db6deac4f15dac4f42f23bc56448fc8d4d (diff) |
x86, intr-remap: enable interrupt remapping early
Currently, when x2apic is not enabled, interrupt remapping
will be enabled in init_dmars(), where it is too late to remap
ioapic interrupts, that is, ioapic interrupts are really in
compatibility mode, not remappable mode.
This patch always enables interrupt remapping before ioapic
setup, it guarantees all interrupts will be remapped when
interrupt remapping is enabled. Thus it doesn't need to set
the compatibility interrupt bit.
[ Impact: refactor intr-remap init sequence, enable fuller remap mode ]
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Weidong Han <weidong.han@intel.com>
Acked-by: David Woodhouse <David.Woodhouse@intel.com>
Cc: iommu@lists.linux-foundation.org
Cc: allen.m.kay@intel.com
Cc: fenghua.yu@intel.com
LKML-Reference: <1239957736-6161-4-git-send-email-weidong.han@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/pci/intr_remapping.c')
-rw-r--r-- | drivers/pci/intr_remapping.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c index f5e0ea724a6f..5c2142656e96 100644 --- a/drivers/pci/intr_remapping.c +++ b/drivers/pci/intr_remapping.c | |||
@@ -423,20 +423,6 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode) | |||
423 | readl, (sts & DMA_GSTS_IRTPS), sts); | 423 | readl, (sts & DMA_GSTS_IRTPS), sts); |
424 | spin_unlock_irqrestore(&iommu->register_lock, flags); | 424 | spin_unlock_irqrestore(&iommu->register_lock, flags); |
425 | 425 | ||
426 | if (mode == 0) { | ||
427 | spin_lock_irqsave(&iommu->register_lock, flags); | ||
428 | |||
429 | /* enable comaptiblity format interrupt pass through */ | ||
430 | cmd = iommu->gcmd | DMA_GCMD_CFI; | ||
431 | iommu->gcmd |= DMA_GCMD_CFI; | ||
432 | writel(cmd, iommu->reg + DMAR_GCMD_REG); | ||
433 | |||
434 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, | ||
435 | readl, (sts & DMA_GSTS_CFIS), sts); | ||
436 | |||
437 | spin_unlock_irqrestore(&iommu->register_lock, flags); | ||
438 | } | ||
439 | |||
440 | /* | 426 | /* |
441 | * global invalidation of interrupt entry cache before enabling | 427 | * global invalidation of interrupt entry cache before enabling |
442 | * interrupt-remapping. | 428 | * interrupt-remapping. |
@@ -516,6 +502,20 @@ end: | |||
516 | spin_unlock_irqrestore(&iommu->register_lock, flags); | 502 | spin_unlock_irqrestore(&iommu->register_lock, flags); |
517 | } | 503 | } |
518 | 504 | ||
505 | int __init intr_remapping_supported(void) | ||
506 | { | ||
507 | struct dmar_drhd_unit *drhd; | ||
508 | |||
509 | for_each_drhd_unit(drhd) { | ||
510 | struct intel_iommu *iommu = drhd->iommu; | ||
511 | |||
512 | if (!ecap_ir_support(iommu->ecap)) | ||
513 | return 0; | ||
514 | } | ||
515 | |||
516 | return 1; | ||
517 | } | ||
518 | |||
519 | int __init enable_intr_remapping(int eim) | 519 | int __init enable_intr_remapping(int eim) |
520 | { | 520 | { |
521 | struct dmar_drhd_unit *drhd; | 521 | struct dmar_drhd_unit *drhd; |