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authorHan, Weidong <weidong.han@intel.com>2009-04-03 05:15:47 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-04-03 16:46:01 -0400
commit161fde083f3403e7aa178dc944bf43c339e18491 (patch)
tree79473edadf7aad496c9158400ea7bb4f8336516e /drivers/pci/intr_remapping.c
parentb24696bc55f66fecc30715e003f10fc2555a9271 (diff)
intel-iommu: set compatibility format interrupt
When extended interrupt mode (x2apic mode) is not supported in a system, it must set compatibility format interrupt to bypass interrupt remapping, otherwise compatibility format interrupts will be blocked. This will be used when interrupt remapping is enabled while x2apic is not supported. Signed-off-by: Weidong Han <weidong.han@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/intr_remapping.c')
-rw-r--r--drivers/pci/intr_remapping.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/pci/intr_remapping.c b/drivers/pci/intr_remapping.c
index c26633d7e7da..ef25caade54b 100644
--- a/drivers/pci/intr_remapping.c
+++ b/drivers/pci/intr_remapping.c
@@ -415,12 +415,27 @@ static void iommu_set_intr_remapping(struct intel_iommu *iommu, int mode)
415 415
416 /* Set interrupt-remapping table pointer */ 416 /* Set interrupt-remapping table pointer */
417 cmd = iommu->gcmd | DMA_GCMD_SIRTP; 417 cmd = iommu->gcmd | DMA_GCMD_SIRTP;
418 iommu->gcmd |= DMA_GCMD_SIRTP;
418 writel(cmd, iommu->reg + DMAR_GCMD_REG); 419 writel(cmd, iommu->reg + DMAR_GCMD_REG);
419 420
420 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, 421 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
421 readl, (sts & DMA_GSTS_IRTPS), sts); 422 readl, (sts & DMA_GSTS_IRTPS), sts);
422 spin_unlock_irqrestore(&iommu->register_lock, flags); 423 spin_unlock_irqrestore(&iommu->register_lock, flags);
423 424
425 if (mode == 0) {
426 spin_lock_irqsave(&iommu->register_lock, flags);
427
428 /* enable comaptiblity format interrupt pass through */
429 cmd = iommu->gcmd | DMA_GCMD_CFI;
430 iommu->gcmd |= DMA_GCMD_CFI;
431 writel(cmd, iommu->reg + DMAR_GCMD_REG);
432
433 IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
434 readl, (sts & DMA_GSTS_CFIS), sts);
435
436 spin_unlock_irqrestore(&iommu->register_lock, flags);
437 }
438
424 /* 439 /*
425 * global invalidation of interrupt entry cache before enabling 440 * global invalidation of interrupt entry cache before enabling
426 * interrupt-remapping. 441 * interrupt-remapping.