aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci/intel-iommu.c
diff options
context:
space:
mode:
authorDavid Woodhouse <David.Woodhouse@intel.com>2009-06-28 13:52:20 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-06-29 08:39:17 -0400
commit310a5ab93cb4ce29367238f682affd9ac352f4d0 (patch)
treedc5bb8f208778ebe0aee0054b7af516a36e2b543 /drivers/pci/intel-iommu.c
parentc5395d5c4a82159889cb650de93b591ea51d8c56 (diff)
intel-iommu: Performance improvement for dma_pte_clear_range()
It's a bit silly to repeatedly call domain_flush_cache() for each PTE individually, as we clear it. Instead, batch them up and flush a whole range at a time. We might as well refrain from recalculating the PTE address from scratch each time round the loop too. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/intel-iommu.c')
-rw-r--r--drivers/pci/intel-iommu.c31
1 files changed, 15 insertions, 16 deletions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index c5caf7d63a0f..ba7e37f7111a 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -761,34 +761,33 @@ static struct dma_pte *dma_pfn_level_pte(struct dmar_domain *domain,
761 return NULL; 761 return NULL;
762} 762}
763 763
764/* clear one page's page table */
765static void dma_pte_clear_one(struct dmar_domain *domain, unsigned long pfn)
766{
767 struct dma_pte *pte = NULL;
768
769 /* get last level pte */
770 pte = dma_pfn_level_pte(domain, pfn, 1);
771
772 if (pte) {
773 dma_clear_pte(pte);
774 domain_flush_cache(domain, pte, sizeof(*pte));
775 }
776}
777
778/* clear last level pte, a tlb flush should be followed */ 764/* clear last level pte, a tlb flush should be followed */
779static void dma_pte_clear_range(struct dmar_domain *domain, 765static void dma_pte_clear_range(struct dmar_domain *domain,
780 unsigned long start_pfn, 766 unsigned long start_pfn,
781 unsigned long last_pfn) 767 unsigned long last_pfn)
782{ 768{
783 int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; 769 int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT;
770 struct dma_pte *first_pte, *pte;
784 771
785 BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width); 772 BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width);
786 BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width); 773 BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width);
787 774
788 /* we don't need lock here; nobody else touches the iova range */ 775 /* we don't need lock here; nobody else touches the iova range */
789 while (start_pfn <= last_pfn) { 776 while (start_pfn <= last_pfn) {
790 dma_pte_clear_one(domain, start_pfn); 777 first_pte = pte = dma_pfn_level_pte(domain, start_pfn, 1);
791 start_pfn++; 778 if (!pte) {
779 start_pfn = align_to_level(start_pfn + 1, 2);
780 continue;
781 }
782 while (start_pfn <= last_pfn &&
783 (unsigned long)pte >> VTD_PAGE_SHIFT ==
784 (unsigned long)first_pte >> VTD_PAGE_SHIFT) {
785 dma_clear_pte(pte);
786 start_pfn++;
787 pte++;
788 }
789 domain_flush_cache(domain, first_pte,
790 (void *)pte - (void *)first_pte);
792 } 791 }
793} 792}
794 793