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authorSuresh Siddha <suresh.b.siddha@intel.com>2008-07-10 14:16:41 -0400
committerIngo Molnar <mingo@elte.hu>2008-07-12 02:44:51 -0400
commitcf1337f0447e5be8e66daa944f0ea3bcac2b6179 (patch)
tree6e5120ba9a75fee603a660b4324c147b9e455c79 /drivers/pci/intel-iommu.c
parentad3ad3f6a2caebf56869b83b69e23eb9fa5e0ab6 (diff)
x64, x2apic/intr-remap: move IOMMU_WAIT_OP() macro to intel-iommu.h
move IOMMU_WAIT_OP() macro to header file. This will be used by both DMA-remapping and Intr-remapping. Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com> Cc: akpm@linux-foundation.org Cc: arjan@linux.intel.com Cc: andi@firstfloor.org Cc: ebiederm@xmission.com Cc: jbarnes@virtuousgeek.org Cc: steiner@sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers/pci/intel-iommu.c')
-rw-r--r--drivers/pci/intel-iommu.c15
1 files changed, 0 insertions, 15 deletions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 218a1f357b4d..fb701d9dd8c0 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -49,8 +49,6 @@
49 49
50#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48 50#define DEFAULT_DOMAIN_ADDRESS_WIDTH 48
51 51
52#define DMAR_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000) /* 10sec */
53
54#define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1) 52#define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1)
55 53
56 54
@@ -486,19 +484,6 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu)
486 return 0; 484 return 0;
487} 485}
488 486
489#define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) \
490{\
491 cycles_t start_time = get_cycles();\
492 while (1) {\
493 sts = op (iommu->reg + offset);\
494 if (cond)\
495 break;\
496 if (DMAR_OPERATION_TIMEOUT < (get_cycles() - start_time))\
497 panic("DMAR hardware is malfunctioning\n");\
498 cpu_relax();\
499 }\
500}
501
502static void iommu_set_root_entry(struct intel_iommu *iommu) 487static void iommu_set_root_entry(struct intel_iommu *iommu)
503{ 488{
504 void *addr; 489 void *addr;