aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pci/hotplug
diff options
context:
space:
mode:
authorBjorn Helgaas <bjorn.helgaas@hp.com>2009-09-14 18:35:30 -0400
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-09-14 20:39:11 -0400
commit11876e52e9148bf923795d6fcf8abed7f3662aaa (patch)
tree26c92c1064261e0c47897c4d1d14e52eda6a2a62 /drivers/pci/hotplug
parentd569c74d78ffcde2f163256e4da934ec3bacff0e (diff)
PCI hotplug: shpchp: use generic pci_configure_slot()
Use the generic pci_configure_slot() rather than the SHPC-specific program_fw_provided_values(). Unlike the previous SHPC-specific code, pci_configure_slot() programs PCIe settings when an _HPX method provides them, so if it's possible to have an SHPC-managed PCIe device, it can now be configured. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/hotplug')
-rw-r--r--drivers/pci/hotplug/shpchp.h7
-rw-r--r--drivers/pci/hotplug/shpchp_pci.c62
2 files changed, 1 insertions, 68 deletions
diff --git a/drivers/pci/hotplug/shpchp.h b/drivers/pci/hotplug/shpchp.h
index ad6a255cf0a5..bd588eb8e922 100644
--- a/drivers/pci/hotplug/shpchp.h
+++ b/drivers/pci/hotplug/shpchp.h
@@ -188,19 +188,12 @@ static inline const char *slot_name(struct slot *slot)
188 188
189#ifdef CONFIG_ACPI 189#ifdef CONFIG_ACPI
190#include <linux/pci-acpi.h> 190#include <linux/pci-acpi.h>
191static inline int get_hp_params_from_firmware(struct pci_dev *dev,
192 struct hotplug_params *hpp)
193{
194 return acpi_get_hp_params_from_firmware(dev, hpp);
195}
196
197static inline int get_hp_hw_control_from_firmware(struct pci_dev *dev) 191static inline int get_hp_hw_control_from_firmware(struct pci_dev *dev)
198{ 192{
199 u32 flags = OSC_SHPC_NATIVE_HP_CONTROL; 193 u32 flags = OSC_SHPC_NATIVE_HP_CONTROL;
200 return acpi_get_hp_hw_control_from_firmware(dev, flags); 194 return acpi_get_hp_hw_control_from_firmware(dev, flags);
201} 195}
202#else 196#else
203#define get_hp_params_from_firmware(dev, hpp) (-ENODEV)
204#define get_hp_hw_control_from_firmware(dev) (0) 197#define get_hp_hw_control_from_firmware(dev) (0)
205#endif 198#endif
206 199
diff --git a/drivers/pci/hotplug/shpchp_pci.c b/drivers/pci/hotplug/shpchp_pci.c
index aa315e52529b..8c3d3219f227 100644
--- a/drivers/pci/hotplug/shpchp_pci.c
+++ b/drivers/pci/hotplug/shpchp_pci.c
@@ -34,66 +34,6 @@
34#include "../pci.h" 34#include "../pci.h"
35#include "shpchp.h" 35#include "shpchp.h"
36 36
37static void program_fw_provided_values(struct pci_dev *dev)
38{
39 u16 pci_cmd, pci_bctl;
40 struct pci_dev *cdev;
41 struct hotplug_params hpp;
42
43 /* Program hpp values for this device */
44 if (!(dev->hdr_type == PCI_HEADER_TYPE_NORMAL ||
45 (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE &&
46 (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)))
47 return;
48
49 /* use default values if we can't get them from firmware */
50 if (get_hp_params_from_firmware(dev, &hpp) ||
51 !hpp.t0 || (hpp.t0->revision > 1)) {
52 warn("Could not get hotplug parameters. Use defaults\n");
53 hpp.t0 = &hpp.type0_data;
54 hpp.t0->revision = 0;
55 hpp.t0->cache_line_size = 8;
56 hpp.t0->latency_timer = 0x40;
57 hpp.t0->enable_serr = 0;
58 hpp.t0->enable_perr = 0;
59 }
60
61 pci_write_config_byte(dev,
62 PCI_CACHE_LINE_SIZE, hpp.t0->cache_line_size);
63 pci_write_config_byte(dev, PCI_LATENCY_TIMER, hpp.t0->latency_timer);
64 pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
65 if (hpp.t0->enable_serr)
66 pci_cmd |= PCI_COMMAND_SERR;
67 else
68 pci_cmd &= ~PCI_COMMAND_SERR;
69 if (hpp.t0->enable_perr)
70 pci_cmd |= PCI_COMMAND_PARITY;
71 else
72 pci_cmd &= ~PCI_COMMAND_PARITY;
73 pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
74
75 /* Program bridge control value and child devices */
76 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
77 pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER,
78 hpp.t0->latency_timer);
79 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &pci_bctl);
80 if (hpp.t0->enable_serr)
81 pci_bctl |= PCI_BRIDGE_CTL_SERR;
82 else
83 pci_bctl &= ~PCI_BRIDGE_CTL_SERR;
84 if (hpp.t0->enable_perr)
85 pci_bctl |= PCI_BRIDGE_CTL_PARITY;
86 else
87 pci_bctl &= ~PCI_BRIDGE_CTL_PARITY;
88 pci_write_config_word(dev, PCI_BRIDGE_CONTROL, pci_bctl);
89 if (dev->subordinate) {
90 list_for_each_entry(cdev, &dev->subordinate->devices,
91 bus_list)
92 program_fw_provided_values(cdev);
93 }
94 }
95}
96
97int __ref shpchp_configure_device(struct slot *p_slot) 37int __ref shpchp_configure_device(struct slot *p_slot)
98{ 38{
99 struct pci_dev *dev; 39 struct pci_dev *dev;
@@ -153,7 +93,7 @@ int __ref shpchp_configure_device(struct slot *p_slot)
153 child->subordinate = pci_do_scan_bus(child); 93 child->subordinate = pci_do_scan_bus(child);
154 pci_bus_size_bridges(child); 94 pci_bus_size_bridges(child);
155 } 95 }
156 program_fw_provided_values(dev); 96 pci_configure_slot(dev);
157 pci_dev_put(dev); 97 pci_dev_put(dev);
158 } 98 }
159 99