diff options
author | Yinghai Lu <yinghai@kernel.org> | 2014-09-22 22:36:09 -0400 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2014-09-23 12:03:57 -0400 |
commit | cf8d7b589c53f17e10e9f1ef91dd9e2ba3ca9a7c (patch) | |
tree | 78fbc2ae164b333fba4992f08418c369e6da2b6e /drivers/pci/hotplug | |
parent | d433889cd5a0933fbd90f1e65bff5a8d7963cc52 (diff) |
PCI: pciehp: Add more Slot Control debug output
Add more Slot Control debug output and move one print after
pcie_write_cmd() to be consistent with other debug output.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/hotplug')
-rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 3673a913379f..5a0a50327a91 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -422,9 +422,9 @@ void pciehp_set_attention_status(struct slot *slot, u8 value) | |||
422 | default: | 422 | default: |
423 | return; | 423 | return; |
424 | } | 424 | } |
425 | pcie_write_cmd(ctrl, slot_cmd, PCI_EXP_SLTCTL_AIC); | ||
425 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | 426 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, |
426 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); | 427 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, slot_cmd); |
427 | pcie_write_cmd(ctrl, slot_cmd, PCI_EXP_SLTCTL_AIC); | ||
428 | } | 428 | } |
429 | 429 | ||
430 | void pciehp_green_led_on(struct slot *slot) | 430 | void pciehp_green_led_on(struct slot *slot) |
@@ -602,6 +602,8 @@ void pcie_enable_notification(struct controller *ctrl) | |||
602 | PCI_EXP_SLTCTL_DLLSCE); | 602 | PCI_EXP_SLTCTL_DLLSCE); |
603 | 603 | ||
604 | pcie_write_cmd(ctrl, cmd, mask); | 604 | pcie_write_cmd(ctrl, cmd, mask); |
605 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | ||
606 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, cmd); | ||
605 | } | 607 | } |
606 | 608 | ||
607 | static void pcie_disable_notification(struct controller *ctrl) | 609 | static void pcie_disable_notification(struct controller *ctrl) |
@@ -613,6 +615,8 @@ static void pcie_disable_notification(struct controller *ctrl) | |||
613 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE | | 615 | PCI_EXP_SLTCTL_HPIE | PCI_EXP_SLTCTL_CCIE | |
614 | PCI_EXP_SLTCTL_DLLSCE); | 616 | PCI_EXP_SLTCTL_DLLSCE); |
615 | pcie_write_cmd(ctrl, 0, mask); | 617 | pcie_write_cmd(ctrl, 0, mask); |
618 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | ||
619 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); | ||
616 | } | 620 | } |
617 | 621 | ||
618 | /* | 622 | /* |
@@ -640,6 +644,8 @@ int pciehp_reset_slot(struct slot *slot, int probe) | |||
640 | stat_mask |= PCI_EXP_SLTSTA_DLLSC; | 644 | stat_mask |= PCI_EXP_SLTSTA_DLLSC; |
641 | 645 | ||
642 | pcie_write_cmd(ctrl, 0, ctrl_mask); | 646 | pcie_write_cmd(ctrl, 0, ctrl_mask); |
647 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | ||
648 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, 0); | ||
643 | if (pciehp_poll_mode) | 649 | if (pciehp_poll_mode) |
644 | del_timer_sync(&ctrl->poll_timer); | 650 | del_timer_sync(&ctrl->poll_timer); |
645 | 651 | ||
@@ -647,6 +653,8 @@ int pciehp_reset_slot(struct slot *slot, int probe) | |||
647 | 653 | ||
648 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, stat_mask); | 654 | pcie_capability_write_word(pdev, PCI_EXP_SLTSTA, stat_mask); |
649 | pcie_write_cmd(ctrl, ctrl_mask, ctrl_mask); | 655 | pcie_write_cmd(ctrl, ctrl_mask, ctrl_mask); |
656 | ctrl_dbg(ctrl, "%s: SLOTCTRL %x write cmd %x\n", __func__, | ||
657 | pci_pcie_cap(ctrl->pcie->port) + PCI_EXP_SLTCTL, ctrl_mask); | ||
650 | if (pciehp_poll_mode) | 658 | if (pciehp_poll_mode) |
651 | int_poll_timeout(ctrl->poll_timer.data); | 659 | int_poll_timeout(ctrl->poll_timer.data); |
652 | 660 | ||