diff options
author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2006-05-11 22:05:59 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2006-06-19 17:13:24 -0400 |
commit | d4fbf600666569c3921d12bdcfcfdb2cdb4fd5fb (patch) | |
tree | 3b5ac234da4a4498f4c17a3bf32e7d1c2543db95 /drivers/pci/hotplug | |
parent | 132066a9c84af6f5e8d893145a9c63f849143867 (diff) |
[PATCH] shpchp: Remove unnecessary hpc_ctlr_handle check
This patch removes unnecessary error check for hpc_ctlr_handle.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Cc: Kristen Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/hotplug')
-rw-r--r-- | drivers/pci/hotplug/shpchp_hpc.c | 197 |
1 files changed, 16 insertions, 181 deletions
diff --git a/drivers/pci/hotplug/shpchp_hpc.c b/drivers/pci/hotplug/shpchp_hpc.c index 5e8f589d0b64..5135ceb404d8 100644 --- a/drivers/pci/hotplug/shpchp_hpc.c +++ b/drivers/pci/hotplug/shpchp_hpc.c | |||
@@ -330,7 +330,6 @@ static inline int shpc_wait_cmd(struct controller *ctrl) | |||
330 | 330 | ||
331 | static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) | 331 | static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) |
332 | { | 332 | { |
333 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | ||
334 | struct controller *ctrl = slot->ctrl; | 333 | struct controller *ctrl = slot->ctrl; |
335 | u16 cmd_status; | 334 | u16 cmd_status; |
336 | int retval = 0; | 335 | int retval = 0; |
@@ -341,12 +340,6 @@ static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) | |||
341 | 340 | ||
342 | mutex_lock(&slot->ctrl->cmd_lock); | 341 | mutex_lock(&slot->ctrl->cmd_lock); |
343 | 342 | ||
344 | if (!php_ctlr) { | ||
345 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
346 | retval = -EINVAL; | ||
347 | goto out; | ||
348 | } | ||
349 | |||
350 | for (i = 0; i < 10; i++) { | 343 | for (i = 0; i < 10; i++) { |
351 | cmd_status = shpc_readw(ctrl, CMD_STATUS); | 344 | cmd_status = shpc_readw(ctrl, CMD_STATUS); |
352 | 345 | ||
@@ -401,11 +394,6 @@ static int hpc_check_cmd_status(struct controller *ctrl) | |||
401 | int retval = 0; | 394 | int retval = 0; |
402 | 395 | ||
403 | DBG_ENTER_ROUTINE | 396 | DBG_ENTER_ROUTINE |
404 | |||
405 | if (!ctrl->hpc_ctlr_handle) { | ||
406 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
407 | return -1; | ||
408 | } | ||
409 | 397 | ||
410 | cmd_status = shpc_readw(ctrl, CMD_STATUS) & 0x000F; | 398 | cmd_status = shpc_readw(ctrl, CMD_STATUS) & 0x000F; |
411 | 399 | ||
@@ -442,11 +430,6 @@ static int hpc_get_attention_status(struct slot *slot, u8 *status) | |||
442 | 430 | ||
443 | DBG_ENTER_ROUTINE | 431 | DBG_ENTER_ROUTINE |
444 | 432 | ||
445 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
446 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
447 | return -1; | ||
448 | } | ||
449 | |||
450 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); | 433 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); |
451 | state = (slot_reg & ATN_LED_STATE_MASK) >> ATN_LED_STATE_SHIFT; | 434 | state = (slot_reg & ATN_LED_STATE_MASK) >> ATN_LED_STATE_SHIFT; |
452 | 435 | ||
@@ -477,11 +460,6 @@ static int hpc_get_power_status(struct slot * slot, u8 *status) | |||
477 | 460 | ||
478 | DBG_ENTER_ROUTINE | 461 | DBG_ENTER_ROUTINE |
479 | 462 | ||
480 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
481 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
482 | return -1; | ||
483 | } | ||
484 | |||
485 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); | 463 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); |
486 | state = (slot_reg & SLOT_STATE_MASK) >> SLOT_STATE_SHIFT; | 464 | state = (slot_reg & SLOT_STATE_MASK) >> SLOT_STATE_SHIFT; |
487 | 465 | ||
@@ -512,11 +490,6 @@ static int hpc_get_latch_status(struct slot *slot, u8 *status) | |||
512 | 490 | ||
513 | DBG_ENTER_ROUTINE | 491 | DBG_ENTER_ROUTINE |
514 | 492 | ||
515 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
516 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
517 | return -1; | ||
518 | } | ||
519 | |||
520 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); | 493 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); |
521 | *status = !!(slot_reg & MRL_SENSOR); /* 0 -> close; 1 -> open */ | 494 | *status = !!(slot_reg & MRL_SENSOR); /* 0 -> close; 1 -> open */ |
522 | 495 | ||
@@ -532,11 +505,6 @@ static int hpc_get_adapter_status(struct slot *slot, u8 *status) | |||
532 | 505 | ||
533 | DBG_ENTER_ROUTINE | 506 | DBG_ENTER_ROUTINE |
534 | 507 | ||
535 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
536 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
537 | return -1; | ||
538 | } | ||
539 | |||
540 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); | 508 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); |
541 | state = (slot_reg & PRSNT_MASK) >> PRSNT_SHIFT; | 509 | state = (slot_reg & PRSNT_MASK) >> PRSNT_SHIFT; |
542 | *status = (state != 0x3) ? 1 : 0; | 510 | *status = (state != 0x3) ? 1 : 0; |
@@ -550,11 +518,6 @@ static int hpc_get_prog_int(struct slot *slot, u8 *prog_int) | |||
550 | struct controller *ctrl = slot->ctrl; | 518 | struct controller *ctrl = slot->ctrl; |
551 | 519 | ||
552 | DBG_ENTER_ROUTINE | 520 | DBG_ENTER_ROUTINE |
553 | |||
554 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
555 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
556 | return -1; | ||
557 | } | ||
558 | 521 | ||
559 | *prog_int = shpc_readb(ctrl, PROG_INTERFACE); | 522 | *prog_int = shpc_readb(ctrl, PROG_INTERFACE); |
560 | 523 | ||
@@ -626,11 +589,6 @@ static int hpc_get_mode1_ECC_cap(struct slot *slot, u8 *mode) | |||
626 | 589 | ||
627 | DBG_ENTER_ROUTINE | 590 | DBG_ENTER_ROUTINE |
628 | 591 | ||
629 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
630 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
631 | return -1; | ||
632 | } | ||
633 | |||
634 | pi = shpc_readb(ctrl, PROG_INTERFACE); | 592 | pi = shpc_readb(ctrl, PROG_INTERFACE); |
635 | sec_bus_status = shpc_readw(ctrl, SEC_BUS_CONFIG); | 593 | sec_bus_status = shpc_readw(ctrl, SEC_BUS_CONFIG); |
636 | 594 | ||
@@ -653,11 +611,6 @@ static int hpc_query_power_fault(struct slot * slot) | |||
653 | 611 | ||
654 | DBG_ENTER_ROUTINE | 612 | DBG_ENTER_ROUTINE |
655 | 613 | ||
656 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
657 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
658 | return -1; | ||
659 | } | ||
660 | |||
661 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); | 614 | slot_reg = shpc_readl(ctrl, SLOT_REG(slot->hp_slot)); |
662 | 615 | ||
663 | DBG_LEAVE_ROUTINE | 616 | DBG_LEAVE_ROUTINE |
@@ -667,19 +620,7 @@ static int hpc_query_power_fault(struct slot * slot) | |||
667 | 620 | ||
668 | static int hpc_set_attention_status(struct slot *slot, u8 value) | 621 | static int hpc_set_attention_status(struct slot *slot, u8 value) |
669 | { | 622 | { |
670 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | ||
671 | u8 slot_cmd = 0; | 623 | u8 slot_cmd = 0; |
672 | int rc = 0; | ||
673 | |||
674 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
675 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
676 | return -1; | ||
677 | } | ||
678 | |||
679 | if (slot->hp_slot >= php_ctlr->num_slots) { | ||
680 | err("%s: Invalid HPC slot number!\n", __FUNCTION__); | ||
681 | return -1; | ||
682 | } | ||
683 | 624 | ||
684 | switch (value) { | 625 | switch (value) { |
685 | case 0 : | 626 | case 0 : |
@@ -695,76 +636,23 @@ static int hpc_set_attention_status(struct slot *slot, u8 value) | |||
695 | return -1; | 636 | return -1; |
696 | } | 637 | } |
697 | 638 | ||
698 | shpc_write_cmd(slot, slot->hp_slot, slot_cmd); | 639 | return shpc_write_cmd(slot, slot->hp_slot, slot_cmd); |
699 | |||
700 | return rc; | ||
701 | } | 640 | } |
702 | 641 | ||
703 | 642 | ||
704 | static void hpc_set_green_led_on(struct slot *slot) | 643 | static void hpc_set_green_led_on(struct slot *slot) |
705 | { | 644 | { |
706 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | 645 | shpc_write_cmd(slot, slot->hp_slot, 0x04); |
707 | u8 slot_cmd; | ||
708 | |||
709 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
710 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
711 | return ; | ||
712 | } | ||
713 | |||
714 | if (slot->hp_slot >= php_ctlr->num_slots) { | ||
715 | err("%s: Invalid HPC slot number!\n", __FUNCTION__); | ||
716 | return ; | ||
717 | } | ||
718 | |||
719 | slot_cmd = 0x04; | ||
720 | |||
721 | shpc_write_cmd(slot, slot->hp_slot, slot_cmd); | ||
722 | |||
723 | return; | ||
724 | } | 646 | } |
725 | 647 | ||
726 | static void hpc_set_green_led_off(struct slot *slot) | 648 | static void hpc_set_green_led_off(struct slot *slot) |
727 | { | 649 | { |
728 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | 650 | shpc_write_cmd(slot, slot->hp_slot, 0x0c); |
729 | u8 slot_cmd; | ||
730 | |||
731 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
732 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
733 | return ; | ||
734 | } | ||
735 | |||
736 | if (slot->hp_slot >= php_ctlr->num_slots) { | ||
737 | err("%s: Invalid HPC slot number!\n", __FUNCTION__); | ||
738 | return ; | ||
739 | } | ||
740 | |||
741 | slot_cmd = 0x0C; | ||
742 | |||
743 | shpc_write_cmd(slot, slot->hp_slot, slot_cmd); | ||
744 | |||
745 | return; | ||
746 | } | 651 | } |
747 | 652 | ||
748 | static void hpc_set_green_led_blink(struct slot *slot) | 653 | static void hpc_set_green_led_blink(struct slot *slot) |
749 | { | 654 | { |
750 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | 655 | shpc_write_cmd(slot, slot->hp_slot, 0x08); |
751 | u8 slot_cmd; | ||
752 | |||
753 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
754 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
755 | return ; | ||
756 | } | ||
757 | |||
758 | if (slot->hp_slot >= php_ctlr->num_slots) { | ||
759 | err("%s: Invalid HPC slot number!\n", __FUNCTION__); | ||
760 | return ; | ||
761 | } | ||
762 | |||
763 | slot_cmd = 0x08; | ||
764 | |||
765 | shpc_write_cmd(slot, slot->hp_slot, slot_cmd); | ||
766 | |||
767 | return; | ||
768 | } | 656 | } |
769 | 657 | ||
770 | int shpc_get_ctlr_slot_config(struct controller *ctrl, | 658 | int shpc_get_ctlr_slot_config(struct controller *ctrl, |
@@ -778,11 +666,6 @@ int shpc_get_ctlr_slot_config(struct controller *ctrl, | |||
778 | 666 | ||
779 | DBG_ENTER_ROUTINE | 667 | DBG_ENTER_ROUTINE |
780 | 668 | ||
781 | if (!ctrl->hpc_ctlr_handle) { | ||
782 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
783 | return -1; | ||
784 | } | ||
785 | |||
786 | slot_config = shpc_readl(ctrl, SLOT_CONFIG); | 669 | slot_config = shpc_readl(ctrl, SLOT_CONFIG); |
787 | *first_device_num = (slot_config & FIRST_DEV_NUM) >> 8; | 670 | *first_device_num = (slot_config & FIRST_DEV_NUM) >> 8; |
788 | *num_ctlr_slots = slot_config & SLOT_NUM; | 671 | *num_ctlr_slots = slot_config & SLOT_NUM; |
@@ -804,11 +687,6 @@ static void hpc_release_ctlr(struct controller *ctrl) | |||
804 | 687 | ||
805 | DBG_ENTER_ROUTINE | 688 | DBG_ENTER_ROUTINE |
806 | 689 | ||
807 | if (!ctrl->hpc_ctlr_handle) { | ||
808 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
809 | return ; | ||
810 | } | ||
811 | |||
812 | /* | 690 | /* |
813 | * Mask event interrupts and SERRs of all slots | 691 | * Mask event interrupts and SERRs of all slots |
814 | */ | 692 | */ |
@@ -881,96 +759,53 @@ DBG_LEAVE_ROUTINE | |||
881 | 759 | ||
882 | static int hpc_power_on_slot(struct slot * slot) | 760 | static int hpc_power_on_slot(struct slot * slot) |
883 | { | 761 | { |
884 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | 762 | int retval; |
885 | u8 slot_cmd; | ||
886 | int retval = 0; | ||
887 | 763 | ||
888 | DBG_ENTER_ROUTINE | 764 | DBG_ENTER_ROUTINE |
889 | 765 | ||
890 | if (!slot->ctrl->hpc_ctlr_handle) { | 766 | retval = shpc_write_cmd(slot, slot->hp_slot, 0x01); |
891 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
892 | return -1; | ||
893 | } | ||
894 | |||
895 | if (slot->hp_slot >= php_ctlr->num_slots) { | ||
896 | err("%s: Invalid HPC slot number!\n", __FUNCTION__); | ||
897 | return -1; | ||
898 | } | ||
899 | slot_cmd = 0x01; | ||
900 | |||
901 | retval = shpc_write_cmd(slot, slot->hp_slot, slot_cmd); | ||
902 | |||
903 | if (retval) { | 767 | if (retval) { |
904 | err("%s: Write command failed!\n", __FUNCTION__); | 768 | err("%s: Write command failed!\n", __FUNCTION__); |
905 | return -1; | 769 | return retval; |
906 | } | 770 | } |
907 | 771 | ||
908 | DBG_LEAVE_ROUTINE | 772 | DBG_LEAVE_ROUTINE |
909 | 773 | ||
910 | return retval; | 774 | return 0; |
911 | } | 775 | } |
912 | 776 | ||
913 | static int hpc_slot_enable(struct slot * slot) | 777 | static int hpc_slot_enable(struct slot * slot) |
914 | { | 778 | { |
915 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | 779 | int retval; |
916 | u8 slot_cmd; | ||
917 | int retval = 0; | ||
918 | 780 | ||
919 | DBG_ENTER_ROUTINE | 781 | DBG_ENTER_ROUTINE |
920 | 782 | ||
921 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
922 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
923 | return -1; | ||
924 | } | ||
925 | |||
926 | if (slot->hp_slot >= php_ctlr->num_slots) { | ||
927 | err("%s: Invalid HPC slot number!\n", __FUNCTION__); | ||
928 | return -1; | ||
929 | } | ||
930 | /* 3A => Slot - Enable, Power Indicator - Blink, Attention Indicator - Off */ | 783 | /* 3A => Slot - Enable, Power Indicator - Blink, Attention Indicator - Off */ |
931 | slot_cmd = 0x3A; | 784 | retval = shpc_write_cmd(slot, slot->hp_slot, 0x3a); |
932 | |||
933 | retval = shpc_write_cmd(slot, slot->hp_slot, slot_cmd); | ||
934 | |||
935 | if (retval) { | 785 | if (retval) { |
936 | err("%s: Write command failed!\n", __FUNCTION__); | 786 | err("%s: Write command failed!\n", __FUNCTION__); |
937 | return -1; | 787 | return retval; |
938 | } | 788 | } |
939 | 789 | ||
940 | DBG_LEAVE_ROUTINE | 790 | DBG_LEAVE_ROUTINE |
941 | return retval; | 791 | return 0; |
942 | } | 792 | } |
943 | 793 | ||
944 | static int hpc_slot_disable(struct slot * slot) | 794 | static int hpc_slot_disable(struct slot * slot) |
945 | { | 795 | { |
946 | struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; | 796 | int retval; |
947 | u8 slot_cmd; | ||
948 | int retval = 0; | ||
949 | 797 | ||
950 | DBG_ENTER_ROUTINE | 798 | DBG_ENTER_ROUTINE |
951 | 799 | ||
952 | if (!slot->ctrl->hpc_ctlr_handle) { | ||
953 | err("%s: Invalid HPC controller handle!\n", __FUNCTION__); | ||
954 | return -1; | ||
955 | } | ||
956 | |||
957 | if (slot->hp_slot >= php_ctlr->num_slots) { | ||
958 | err("%s: Invalid HPC slot number!\n", __FUNCTION__); | ||
959 | return -1; | ||
960 | } | ||
961 | |||
962 | /* 1F => Slot - Disable, Power Indicator - Off, Attention Indicator - On */ | 800 | /* 1F => Slot - Disable, Power Indicator - Off, Attention Indicator - On */ |
963 | slot_cmd = 0x1F; | 801 | retval = shpc_write_cmd(slot, slot->hp_slot, 0x1f); |
964 | |||
965 | retval = shpc_write_cmd(slot, slot->hp_slot, slot_cmd); | ||
966 | |||
967 | if (retval) { | 802 | if (retval) { |
968 | err("%s: Write command failed!\n", __FUNCTION__); | 803 | err("%s: Write command failed!\n", __FUNCTION__); |
969 | return -1; | 804 | return retval; |
970 | } | 805 | } |
971 | 806 | ||
972 | DBG_LEAVE_ROUTINE | 807 | DBG_LEAVE_ROUTINE |
973 | return retval; | 808 | return 0; |
974 | } | 809 | } |
975 | 810 | ||
976 | static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value) | 811 | static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value) |