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authorDave Airlie <airlied@starflyer.(none)>2006-01-03 02:18:01 -0500
committerDave Airlie <airlied@linux.ie>2006-01-03 02:18:01 -0500
commit97f2aab6698f3ab2552c41c1024a65ffd0763a6d (patch)
treebb6e3b2949459f54f884c710fc74d40eef00d834 /drivers/pci/hotplug/pciehp_hpc.c
parentd985c1088146607532093d9eaaaf99758f6a4d21 (diff)
parent88026842b0a760145aa71d69e74fbc9ec118ca44 (diff)
drm: merge in Linus mainline
Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c125
1 files changed, 44 insertions, 81 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 7a0e27f0e063..0b8b26beb163 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -27,16 +27,12 @@
27 * 27 *
28 */ 28 */
29 29
30#include <linux/config.h>
31#include <linux/kernel.h> 30#include <linux/kernel.h>
32#include <linux/module.h> 31#include <linux/module.h>
33#include <linux/types.h> 32#include <linux/types.h>
34#include <linux/slab.h>
35#include <linux/vmalloc.h>
36#include <linux/interrupt.h>
37#include <linux/spinlock.h>
38#include <linux/pci.h> 33#include <linux/pci.h>
39#include <asm/system.h> 34#include <linux/interrupt.h>
35
40#include "../pci.h" 36#include "../pci.h"
41#include "pciehp.h" 37#include "pciehp.h"
42 38
@@ -217,23 +213,6 @@ static int pcie_cap_base = 0; /* Base of the PCI Express capability item struct
217#define MRL_STATE 0x0020 213#define MRL_STATE 0x0020
218#define PRSN_STATE 0x0040 214#define PRSN_STATE 0x0040
219 215
220struct php_ctlr_state_s {
221 struct php_ctlr_state_s *pnext;
222 struct pci_dev *pci_dev;
223 unsigned int irq;
224 unsigned long flags; /* spinlock's */
225 u32 slot_device_offset;
226 u32 num_slots;
227 struct timer_list int_poll_timer; /* Added for poll event */
228 php_intr_callback_t attention_button_callback;
229 php_intr_callback_t switch_change_callback;
230 php_intr_callback_t presence_change_callback;
231 php_intr_callback_t power_fault_callback;
232 void *callback_instance_id;
233 struct ctrl_reg *creg; /* Ptr to controller register space */
234};
235
236
237static spinlock_t hpc_event_lock; 216static spinlock_t hpc_event_lock;
238 217
239DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */ 218DEFINE_DBG_BUFFER /* Debug string buffer for entire HPC defined here */
@@ -297,7 +276,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
297 276
298 DBG_ENTER_ROUTINE 277 DBG_ENTER_ROUTINE
299 278
300 dbg("%s : Enter\n", __FUNCTION__);
301 if (!php_ctlr) { 279 if (!php_ctlr) {
302 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 280 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
303 return -1; 281 return -1;
@@ -308,7 +286,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
308 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 286 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
309 return retval; 287 return retval;
310 } 288 }
311 dbg("%s : hp_register_read_word SLOT_STATUS %x\n", __FUNCTION__, slot_status);
312 289
313 if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { 290 if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
314 /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue 291 /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue
@@ -316,14 +293,11 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
316 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__); 293 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__);
317 } 294 }
318 295
319 dbg("%s: Before hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd);
320 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE); 296 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE);
321 if (retval) { 297 if (retval) {
322 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 298 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
323 return retval; 299 return retval;
324 } 300 }
325 dbg("%s : hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd | CMD_CMPL_INTR_ENABLE);
326 dbg("%s : Exit\n", __FUNCTION__);
327 301
328 DBG_LEAVE_ROUTINE 302 DBG_LEAVE_ROUTINE
329 return retval; 303 return retval;
@@ -509,7 +483,6 @@ static int hpc_query_power_fault(struct slot * slot)
509 u16 slot_status; 483 u16 slot_status;
510 u8 pwr_fault; 484 u8 pwr_fault;
511 int retval = 0; 485 int retval = 0;
512 u8 status;
513 486
514 DBG_ENTER_ROUTINE 487 DBG_ENTER_ROUTINE
515 488
@@ -521,15 +494,13 @@ static int hpc_query_power_fault(struct slot * slot)
521 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status); 494 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(slot->ctrl->cap_base), slot_status);
522 495
523 if (retval) { 496 if (retval) {
524 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 497 err("%s : Cannot check for power fault\n", __FUNCTION__);
525 return retval; 498 return retval;
526 } 499 }
527 pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1); 500 pwr_fault = (u8)((slot_status & PWR_FAULT_DETECTED) >> 1);
528 status = (pwr_fault != 1) ? 1 : 0;
529 501
530 DBG_LEAVE_ROUTINE 502 DBG_LEAVE_ROUTINE
531 /* Note: Logic 0 => fault */ 503 return pwr_fault;
532 return status;
533} 504}
534 505
535static int hpc_set_attention_status(struct slot *slot, u8 value) 506static int hpc_set_attention_status(struct slot *slot, u8 value)
@@ -539,7 +510,8 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
539 u16 slot_ctrl; 510 u16 slot_ctrl;
540 int rc = 0; 511 int rc = 0;
541 512
542 dbg("%s: \n", __FUNCTION__); 513 DBG_ENTER_ROUTINE
514
543 if (!php_ctlr) { 515 if (!php_ctlr) {
544 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 516 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
545 return -1; 517 return -1;
@@ -555,7 +527,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
555 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 527 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
556 return rc; 528 return rc;
557 } 529 }
558 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
559 530
560 switch (value) { 531 switch (value) {
561 case 0 : /* turn off */ 532 case 0 : /* turn off */
@@ -576,6 +547,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
576 pcie_write_cmd(slot, slot_cmd); 547 pcie_write_cmd(slot, slot_cmd);
577 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 548 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
578 549
550 DBG_LEAVE_ROUTINE
579 return rc; 551 return rc;
580} 552}
581 553
@@ -587,7 +559,8 @@ static void hpc_set_green_led_on(struct slot *slot)
587 u16 slot_ctrl; 559 u16 slot_ctrl;
588 int rc = 0; 560 int rc = 0;
589 561
590 dbg("%s: \n", __FUNCTION__); 562 DBG_ENTER_ROUTINE
563
591 if (!php_ctlr) { 564 if (!php_ctlr) {
592 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 565 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
593 return ; 566 return ;
@@ -604,7 +577,6 @@ static void hpc_set_green_led_on(struct slot *slot)
604 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 577 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
605 return; 578 return;
606 } 579 }
607 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
608 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0100; 580 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0100;
609 if (!pciehp_poll_mode) 581 if (!pciehp_poll_mode)
610 slot_cmd = slot_cmd | HP_INTR_ENABLE; 582 slot_cmd = slot_cmd | HP_INTR_ENABLE;
@@ -612,6 +584,7 @@ static void hpc_set_green_led_on(struct slot *slot)
612 pcie_write_cmd(slot, slot_cmd); 584 pcie_write_cmd(slot, slot_cmd);
613 585
614 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 586 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
587 DBG_LEAVE_ROUTINE
615 return; 588 return;
616} 589}
617 590
@@ -622,7 +595,8 @@ static void hpc_set_green_led_off(struct slot *slot)
622 u16 slot_ctrl; 595 u16 slot_ctrl;
623 int rc = 0; 596 int rc = 0;
624 597
625 dbg("%s: \n", __FUNCTION__); 598 DBG_ENTER_ROUTINE
599
626 if (!php_ctlr) { 600 if (!php_ctlr) {
627 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 601 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
628 return ; 602 return ;
@@ -639,7 +613,6 @@ static void hpc_set_green_led_off(struct slot *slot)
639 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 613 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
640 return; 614 return;
641 } 615 }
642 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
643 616
644 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0300; 617 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0300;
645 618
@@ -648,6 +621,7 @@ static void hpc_set_green_led_off(struct slot *slot)
648 pcie_write_cmd(slot, slot_cmd); 621 pcie_write_cmd(slot, slot_cmd);
649 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 622 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
650 623
624 DBG_LEAVE_ROUTINE
651 return; 625 return;
652} 626}
653 627
@@ -658,7 +632,8 @@ static void hpc_set_green_led_blink(struct slot *slot)
658 u16 slot_ctrl; 632 u16 slot_ctrl;
659 int rc = 0; 633 int rc = 0;
660 634
661 dbg("%s: \n", __FUNCTION__); 635 DBG_ENTER_ROUTINE
636
662 if (!php_ctlr) { 637 if (!php_ctlr) {
663 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 638 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
664 return ; 639 return ;
@@ -675,7 +650,6 @@ static void hpc_set_green_led_blink(struct slot *slot)
675 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 650 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
676 return; 651 return;
677 } 652 }
678 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
679 653
680 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0200; 654 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0200;
681 655
@@ -684,6 +658,7 @@ static void hpc_set_green_led_blink(struct slot *slot)
684 pcie_write_cmd(slot, slot_cmd); 658 pcie_write_cmd(slot, slot_cmd);
685 659
686 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 660 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
661 DBG_LEAVE_ROUTINE
687 return; 662 return;
688} 663}
689 664
@@ -775,12 +750,11 @@ static int hpc_power_on_slot(struct slot * slot)
775{ 750{
776 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 751 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle;
777 u16 slot_cmd; 752 u16 slot_cmd;
778 u16 slot_ctrl; 753 u16 slot_ctrl, slot_status;
779 754
780 int retval = 0; 755 int retval = 0;
781 756
782 DBG_ENTER_ROUTINE 757 DBG_ENTER_ROUTINE
783 dbg("%s: \n", __FUNCTION__);
784 758
785 if (!php_ctlr) { 759 if (!php_ctlr) {
786 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 760 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
@@ -793,14 +767,20 @@ static int hpc_power_on_slot(struct slot * slot)
793 return -1; 767 return -1;
794 } 768 }
795 769
770 /* Clear sticky power-fault bit from previous power failures */
771 hp_register_read_word(php_ctlr->pci_dev,
772 SLOT_STATUS(slot->ctrl->cap_base), slot_status);
773 slot_status &= PWR_FAULT_DETECTED;
774 if (slot_status)
775 hp_register_write_word(php_ctlr->pci_dev,
776 SLOT_STATUS(slot->ctrl->cap_base), slot_status);
777
796 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl); 778 retval = hp_register_read_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), slot_ctrl);
797 779
798 if (retval) { 780 if (retval) {
799 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 781 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
800 return retval; 782 return retval;
801 } 783 }
802 dbg("%s: SLOT_CTRL %x, value read %xn", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
803 slot_ctrl);
804 784
805 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON; 785 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON;
806 786
@@ -829,7 +809,6 @@ static int hpc_power_off_slot(struct slot * slot)
829 int retval = 0; 809 int retval = 0;
830 810
831 DBG_ENTER_ROUTINE 811 DBG_ENTER_ROUTINE
832 dbg("%s: \n", __FUNCTION__);
833 812
834 if (!php_ctlr) { 813 if (!php_ctlr) {
835 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 814 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
@@ -848,8 +827,6 @@ static int hpc_power_off_slot(struct slot * slot)
848 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 827 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
849 return retval; 828 return retval;
850 } 829 }
851 dbg("%s: SLOT_CTRL %x, value read %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
852 slot_ctrl);
853 830
854 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF; 831 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF;
855 832
@@ -924,7 +901,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
924 return IRQ_NONE; 901 return IRQ_NONE;
925 } 902 }
926 903
927 dbg("%s: Set Mask Hot-plug Interrupt Enable\n", __FUNCTION__);
928 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 904 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
929 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; 905 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
930 906
@@ -933,7 +909,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
933 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 909 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
934 return IRQ_NONE; 910 return IRQ_NONE;
935 } 911 }
936 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
937 912
938 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 913 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
939 if (rc) { 914 if (rc) {
@@ -949,14 +924,12 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
949 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 924 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
950 return IRQ_NONE; 925 return IRQ_NONE;
951 } 926 }
952 dbg("%s: hp_register_write_word SLOT_STATUS with value %x\n", __FUNCTION__, temp_word);
953 } 927 }
954 928
955 if (intr_loc & CMD_COMPLETED) { 929 if (intr_loc & CMD_COMPLETED) {
956 /* 930 /*
957 * Command Complete Interrupt Pending 931 * Command Complete Interrupt Pending
958 */ 932 */
959 dbg("%s: In Command Complete Interrupt Pending\n", __FUNCTION__);
960 wake_up_interruptible(&ctrl->queue); 933 wake_up_interruptible(&ctrl->queue);
961 } 934 }
962 935
@@ -989,7 +962,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
989 } 962 }
990 963
991 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__); 964 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__);
992 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
993 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 965 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
994 966
995 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word); 967 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
@@ -997,14 +969,12 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
997 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 969 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
998 return IRQ_NONE; 970 return IRQ_NONE;
999 } 971 }
1000 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
1001 972
1002 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 973 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1003 if (rc) { 974 if (rc) {
1004 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 975 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1005 return IRQ_NONE; 976 return IRQ_NONE;
1006 } 977 }
1007 dbg("%s: hp_register_read_word SLOT_STATUS with value %x\n", __FUNCTION__, slot_status);
1008 978
1009 /* Clear command complete interrupt caused by this write */ 979 /* Clear command complete interrupt caused by this write */
1010 temp_word = 0x1F; 980 temp_word = 0x1F;
@@ -1248,12 +1218,7 @@ static struct hpc_ops pciehp_hpc_ops = {
1248 .check_lnk_status = hpc_check_lnk_status, 1218 .check_lnk_status = hpc_check_lnk_status,
1249}; 1219};
1250 1220
1251int pcie_init(struct controller * ctrl, 1221int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1252 struct pcie_device *dev,
1253 php_intr_callback_t attention_button_callback,
1254 php_intr_callback_t switch_change_callback,
1255 php_intr_callback_t presence_change_callback,
1256 php_intr_callback_t power_fault_callback)
1257{ 1222{
1258 struct php_ctlr_state_s *php_ctlr, *p; 1223 struct php_ctlr_state_s *php_ctlr, *p;
1259 void *instance_id = ctrl; 1224 void *instance_id = ctrl;
@@ -1282,8 +1247,8 @@ int pcie_init(struct controller * ctrl,
1282 pdev = dev->port; 1247 pdev = dev->port;
1283 php_ctlr->pci_dev = pdev; /* save pci_dev in context */ 1248 php_ctlr->pci_dev = pdev; /* save pci_dev in context */
1284 1249
1285 dbg("%s: pdev->vendor %x pdev->device %x\n", __FUNCTION__, 1250 dbg("%s: hotplug controller vendor id 0x%x device id 0x%x\n",
1286 pdev->vendor, pdev->device); 1251 __FUNCTION__, pdev->vendor, pdev->device);
1287 1252
1288 saved_cap_base = pcie_cap_base; 1253 saved_cap_base = pcie_cap_base;
1289 1254
@@ -1340,8 +1305,6 @@ int pcie_init(struct controller * ctrl,
1340 first = 0; 1305 first = 0;
1341 } 1306 }
1342 1307
1343 dbg("pdev = %p: b:d:f:irq=0x%x:%x:%x:%x\n", pdev, pdev->bus->number,
1344 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq);
1345 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) 1308 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
1346 if (pci_resource_len(pdev, rc) > 0) 1309 if (pci_resource_len(pdev, rc) > 0)
1347 dbg("pci resource[%d] start=0x%lx(len=0x%lx)\n", rc, 1310 dbg("pci resource[%d] start=0x%lx(len=0x%lx)\n", rc,
@@ -1359,13 +1322,12 @@ int pcie_init(struct controller * ctrl,
1359 1322
1360 /* find the IRQ */ 1323 /* find the IRQ */
1361 php_ctlr->irq = dev->irq; 1324 php_ctlr->irq = dev->irq;
1362 dbg("HPC interrupt = %d\n", php_ctlr->irq);
1363 1325
1364 /* Save interrupt callback info */ 1326 /* Save interrupt callback info */
1365 php_ctlr->attention_button_callback = attention_button_callback; 1327 php_ctlr->attention_button_callback = pciehp_handle_attention_button;
1366 php_ctlr->switch_change_callback = switch_change_callback; 1328 php_ctlr->switch_change_callback = pciehp_handle_switch_change;
1367 php_ctlr->presence_change_callback = presence_change_callback; 1329 php_ctlr->presence_change_callback = pciehp_handle_presence_change;
1368 php_ctlr->power_fault_callback = power_fault_callback; 1330 php_ctlr->power_fault_callback = pciehp_handle_power_fault;
1369 php_ctlr->callback_instance_id = instance_id; 1331 php_ctlr->callback_instance_id = instance_id;
1370 1332
1371 /* return PCI Controller Info */ 1333 /* return PCI Controller Info */
@@ -1387,15 +1349,12 @@ int pcie_init(struct controller * ctrl,
1387 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1349 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1388 goto abort_free_ctlr; 1350 goto abort_free_ctlr;
1389 } 1351 }
1390 dbg("%s : Mask HPIE hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, temp_word);
1391 1352
1392 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1353 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1393 if (rc) { 1354 if (rc) {
1394 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1355 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1395 goto abort_free_ctlr; 1356 goto abort_free_ctlr;
1396 } 1357 }
1397 dbg("%s: Mask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base)
1398 , slot_status);
1399 1358
1400 temp_word = 0x1F; /* Clear all events */ 1359 temp_word = 0x1F; /* Clear all events */
1401 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1360 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
@@ -1403,7 +1362,6 @@ int pcie_init(struct controller * ctrl,
1403 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1362 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1404 goto abort_free_ctlr; 1363 goto abort_free_ctlr;
1405 } 1364 }
1406 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1407 1365
1408 if (pciehp_poll_mode) {/* Install interrupt polling code */ 1366 if (pciehp_poll_mode) {/* Install interrupt polling code */
1409 /* Install and start the interrupt polling timer */ 1367 /* Install and start the interrupt polling timer */
@@ -1419,13 +1377,14 @@ int pcie_init(struct controller * ctrl,
1419 } 1377 }
1420 } 1378 }
1421 1379
1380 dbg("pciehp ctrl b:d:f:irq=0x%x:%x:%x:%x\n", pdev->bus->number,
1381 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq);
1382
1422 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word); 1383 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
1423 if (rc) { 1384 if (rc) {
1424 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 1385 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
1425 goto abort_free_ctlr; 1386 goto abort_free_ctlr;
1426 } 1387 }
1427 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(ctrl->cap_base), temp_word);
1428 dbg("%s: slot_cap %x\n", __FUNCTION__, slot_cap);
1429 1388
1430 intr_enable = intr_enable | PRSN_DETECT_ENABLE; 1389 intr_enable = intr_enable | PRSN_DETECT_ENABLE;
1431 1390
@@ -1445,7 +1404,6 @@ int pcie_init(struct controller * ctrl,
1445 } else { 1404 } else {
1446 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 1405 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
1447 } 1406 }
1448 dbg("%s: temp_word %x\n", __FUNCTION__, temp_word);
1449 1407
1450 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */ 1408 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */
1451 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word); 1409 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
@@ -1453,14 +1411,11 @@ int pcie_init(struct controller * ctrl,
1453 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1411 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1454 goto abort_free_ctlr; 1412 goto abort_free_ctlr;
1455 } 1413 }
1456 dbg("%s : Unmask HPIE hp_register_write_word SLOT_CTRL with %x\n", __FUNCTION__, temp_word);
1457 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1414 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1458 if (rc) { 1415 if (rc) {
1459 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1416 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1460 goto abort_free_ctlr; 1417 goto abort_free_ctlr;
1461 } 1418 }
1462 dbg("%s: Unmask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__,
1463 SLOT_STATUS(ctrl->cap_base), slot_status);
1464 1419
1465 temp_word = 0x1F; /* Clear all events */ 1420 temp_word = 0x1F; /* Clear all events */
1466 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1421 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
@@ -1468,8 +1423,16 @@ int pcie_init(struct controller * ctrl,
1468 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1423 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1469 goto abort_free_ctlr; 1424 goto abort_free_ctlr;
1470 } 1425 }
1471 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1472 1426
1427 if (pciehp_force) {
1428 dbg("Bypassing BIOS check for pciehp use on %s\n",
1429 pci_name(ctrl->pci_dev));
1430 } else {
1431 rc = pciehp_get_hp_hw_control_from_firmware(ctrl->pci_dev);
1432 if (rc)
1433 goto abort_free_ctlr;
1434 }
1435
1473 /* Add this HPC instance into the HPC list */ 1436 /* Add this HPC instance into the HPC list */
1474 spin_lock(&list_lock); 1437 spin_lock(&list_lock);
1475 if (php_ctlr_list_head == 0) { 1438 if (php_ctlr_list_head == 0) {