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authorrajesh.shah@intel.com <rajesh.shah@intel.com>2005-10-31 19:20:10 -0500
committerGreg Kroah-Hartman <gregkh@suse.de>2005-11-10 19:09:15 -0500
commit1a9ed1bfe2fb17cc30227a12a3c1212128bb78b6 (patch)
tree17972b04d16dca0bfb66771165928a4db50fb00b /drivers/pci/hotplug/pciehp_hpc.c
parented6cbcf2ac706aa47194fd2f7a99865cc06833d7 (diff)
[PATCH] pciehp: reduce debug message verbosity
Reduce the number of debug messages generated if pciehp debug is enabled. I tried to restrict this to removing debug messages that are either early-driver-debug type messages, or print information that can be inferred through other debug prints. Signed-off-by: Rajesh Shah <rajesh.shah@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c59
1 files changed, 17 insertions, 42 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 5358547f9ee1..5c812b858847 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -274,7 +274,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
274 274
275 DBG_ENTER_ROUTINE 275 DBG_ENTER_ROUTINE
276 276
277 dbg("%s : Enter\n", __FUNCTION__);
278 if (!php_ctlr) { 277 if (!php_ctlr) {
279 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 278 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
280 return -1; 279 return -1;
@@ -285,7 +284,6 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
285 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 284 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
286 return retval; 285 return retval;
287 } 286 }
288 dbg("%s : hp_register_read_word SLOT_STATUS %x\n", __FUNCTION__, slot_status);
289 287
290 if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { 288 if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) {
291 /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue 289 /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue
@@ -293,14 +291,11 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd)
293 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__); 291 dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__);
294 } 292 }
295 293
296 dbg("%s: Before hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd);
297 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE); 294 retval = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(slot->ctrl->cap_base), cmd | CMD_CMPL_INTR_ENABLE);
298 if (retval) { 295 if (retval) {
299 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 296 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
300 return retval; 297 return retval;
301 } 298 }
302 dbg("%s : hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, cmd | CMD_CMPL_INTR_ENABLE);
303 dbg("%s : Exit\n", __FUNCTION__);
304 299
305 DBG_LEAVE_ROUTINE 300 DBG_LEAVE_ROUTINE
306 return retval; 301 return retval;
@@ -516,7 +511,8 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
516 u16 slot_ctrl; 511 u16 slot_ctrl;
517 int rc = 0; 512 int rc = 0;
518 513
519 dbg("%s: \n", __FUNCTION__); 514 DBG_ENTER_ROUTINE
515
520 if (!php_ctlr) { 516 if (!php_ctlr) {
521 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 517 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
522 return -1; 518 return -1;
@@ -532,7 +528,6 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
532 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 528 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
533 return rc; 529 return rc;
534 } 530 }
535 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
536 531
537 switch (value) { 532 switch (value) {
538 case 0 : /* turn off */ 533 case 0 : /* turn off */
@@ -553,6 +548,7 @@ static int hpc_set_attention_status(struct slot *slot, u8 value)
553 pcie_write_cmd(slot, slot_cmd); 548 pcie_write_cmd(slot, slot_cmd);
554 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 549 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
555 550
551 DBG_LEAVE_ROUTINE
556 return rc; 552 return rc;
557} 553}
558 554
@@ -564,7 +560,8 @@ static void hpc_set_green_led_on(struct slot *slot)
564 u16 slot_ctrl; 560 u16 slot_ctrl;
565 int rc = 0; 561 int rc = 0;
566 562
567 dbg("%s: \n", __FUNCTION__); 563 DBG_ENTER_ROUTINE
564
568 if (!php_ctlr) { 565 if (!php_ctlr) {
569 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 566 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
570 return ; 567 return ;
@@ -581,7 +578,6 @@ static void hpc_set_green_led_on(struct slot *slot)
581 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 578 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
582 return; 579 return;
583 } 580 }
584 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
585 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0100; 581 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0100;
586 if (!pciehp_poll_mode) 582 if (!pciehp_poll_mode)
587 slot_cmd = slot_cmd | HP_INTR_ENABLE; 583 slot_cmd = slot_cmd | HP_INTR_ENABLE;
@@ -589,6 +585,7 @@ static void hpc_set_green_led_on(struct slot *slot)
589 pcie_write_cmd(slot, slot_cmd); 585 pcie_write_cmd(slot, slot_cmd);
590 586
591 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 587 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
588 DBG_LEAVE_ROUTINE
592 return; 589 return;
593} 590}
594 591
@@ -599,7 +596,8 @@ static void hpc_set_green_led_off(struct slot *slot)
599 u16 slot_ctrl; 596 u16 slot_ctrl;
600 int rc = 0; 597 int rc = 0;
601 598
602 dbg("%s: \n", __FUNCTION__); 599 DBG_ENTER_ROUTINE
600
603 if (!php_ctlr) { 601 if (!php_ctlr) {
604 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 602 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
605 return ; 603 return ;
@@ -616,7 +614,6 @@ static void hpc_set_green_led_off(struct slot *slot)
616 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 614 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
617 return; 615 return;
618 } 616 }
619 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
620 617
621 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0300; 618 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0300;
622 619
@@ -625,6 +622,7 @@ static void hpc_set_green_led_off(struct slot *slot)
625 pcie_write_cmd(slot, slot_cmd); 622 pcie_write_cmd(slot, slot_cmd);
626 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 623 dbg("%s: SLOT_CTRL %x write cmd %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
627 624
625 DBG_LEAVE_ROUTINE
628 return; 626 return;
629} 627}
630 628
@@ -635,7 +633,8 @@ static void hpc_set_green_led_blink(struct slot *slot)
635 u16 slot_ctrl; 633 u16 slot_ctrl;
636 int rc = 0; 634 int rc = 0;
637 635
638 dbg("%s: \n", __FUNCTION__); 636 DBG_ENTER_ROUTINE
637
639 if (!php_ctlr) { 638 if (!php_ctlr) {
640 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 639 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
641 return ; 640 return ;
@@ -652,7 +651,6 @@ static void hpc_set_green_led_blink(struct slot *slot)
652 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 651 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
653 return; 652 return;
654 } 653 }
655 dbg("%s : hp_register_read_word SLOT_CTRL %x\n", __FUNCTION__, slot_ctrl);
656 654
657 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0200; 655 slot_cmd = (slot_ctrl & ~PWR_LED_CTRL) | 0x0200;
658 656
@@ -661,6 +659,7 @@ static void hpc_set_green_led_blink(struct slot *slot)
661 pcie_write_cmd(slot, slot_cmd); 659 pcie_write_cmd(slot, slot_cmd);
662 660
663 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd); 661 dbg("%s: SLOT_CTRL %x write cmd %x\n",__FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base), slot_cmd);
662 DBG_LEAVE_ROUTINE
664 return; 663 return;
665} 664}
666 665
@@ -757,7 +756,6 @@ static int hpc_power_on_slot(struct slot * slot)
757 int retval = 0; 756 int retval = 0;
758 757
759 DBG_ENTER_ROUTINE 758 DBG_ENTER_ROUTINE
760 dbg("%s: \n", __FUNCTION__);
761 759
762 if (!php_ctlr) { 760 if (!php_ctlr) {
763 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 761 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
@@ -776,8 +774,6 @@ static int hpc_power_on_slot(struct slot * slot)
776 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 774 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
777 return retval; 775 return retval;
778 } 776 }
779 dbg("%s: SLOT_CTRL %x, value read %xn", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
780 slot_ctrl);
781 777
782 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON; 778 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_ON;
783 779
@@ -806,7 +802,6 @@ static int hpc_power_off_slot(struct slot * slot)
806 int retval = 0; 802 int retval = 0;
807 803
808 DBG_ENTER_ROUTINE 804 DBG_ENTER_ROUTINE
809 dbg("%s: \n", __FUNCTION__);
810 805
811 if (!php_ctlr) { 806 if (!php_ctlr) {
812 err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 807 err("%s: Invalid HPC controller handle!\n", __FUNCTION__);
@@ -825,8 +820,6 @@ static int hpc_power_off_slot(struct slot * slot)
825 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 820 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
826 return retval; 821 return retval;
827 } 822 }
828 dbg("%s: SLOT_CTRL %x, value read %x\n", __FUNCTION__, SLOT_CTRL(slot->ctrl->cap_base),
829 slot_ctrl);
830 823
831 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF; 824 slot_cmd = (slot_ctrl & ~PWR_CTRL) | POWER_OFF;
832 825
@@ -901,7 +894,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
901 return IRQ_NONE; 894 return IRQ_NONE;
902 } 895 }
903 896
904 dbg("%s: Set Mask Hot-plug Interrupt Enable\n", __FUNCTION__);
905 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word); 897 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
906 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00; 898 temp_word = (temp_word & ~HP_INTR_ENABLE & ~CMD_CMPL_INTR_ENABLE) | 0x00;
907 899
@@ -910,7 +902,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
910 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 902 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
911 return IRQ_NONE; 903 return IRQ_NONE;
912 } 904 }
913 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
914 905
915 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 906 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
916 if (rc) { 907 if (rc) {
@@ -926,14 +917,12 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
926 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 917 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
927 return IRQ_NONE; 918 return IRQ_NONE;
928 } 919 }
929 dbg("%s: hp_register_write_word SLOT_STATUS with value %x\n", __FUNCTION__, temp_word);
930 } 920 }
931 921
932 if (intr_loc & CMD_COMPLETED) { 922 if (intr_loc & CMD_COMPLETED) {
933 /* 923 /*
934 * Command Complete Interrupt Pending 924 * Command Complete Interrupt Pending
935 */ 925 */
936 dbg("%s: In Command Complete Interrupt Pending\n", __FUNCTION__);
937 wake_up_interruptible(&ctrl->queue); 926 wake_up_interruptible(&ctrl->queue);
938 } 927 }
939 928
@@ -966,7 +955,6 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
966 } 955 }
967 956
968 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__); 957 dbg("%s: Unmask Hot-plug Interrupt Enable\n", __FUNCTION__);
969 dbg("%s: hp_register_read_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
970 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 958 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
971 959
972 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word); 960 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_CTRL(ctrl->cap_base), temp_word);
@@ -974,14 +962,12 @@ static irqreturn_t pcie_isr(int IRQ, void *dev_id, struct pt_regs *regs)
974 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 962 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
975 return IRQ_NONE; 963 return IRQ_NONE;
976 } 964 }
977 dbg("%s: hp_register_write_word SLOT_CTRL with value %x\n", __FUNCTION__, temp_word);
978 965
979 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 966 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
980 if (rc) { 967 if (rc) {
981 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 968 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
982 return IRQ_NONE; 969 return IRQ_NONE;
983 } 970 }
984 dbg("%s: hp_register_read_word SLOT_STATUS with value %x\n", __FUNCTION__, slot_status);
985 971
986 /* Clear command complete interrupt caused by this write */ 972 /* Clear command complete interrupt caused by this write */
987 temp_word = 0x1F; 973 temp_word = 0x1F;
@@ -1254,8 +1240,8 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1254 pdev = dev->port; 1240 pdev = dev->port;
1255 php_ctlr->pci_dev = pdev; /* save pci_dev in context */ 1241 php_ctlr->pci_dev = pdev; /* save pci_dev in context */
1256 1242
1257 dbg("%s: pdev->vendor %x pdev->device %x\n", __FUNCTION__, 1243 dbg("%s: hotplug controller vendor id 0x%x device id 0x%x\n",
1258 pdev->vendor, pdev->device); 1244 __FUNCTION__, pdev->vendor, pdev->device);
1259 1245
1260 saved_cap_base = pcie_cap_base; 1246 saved_cap_base = pcie_cap_base;
1261 1247
@@ -1312,8 +1298,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1312 first = 0; 1298 first = 0;
1313 } 1299 }
1314 1300
1315 dbg("pdev = %p: b:d:f:irq=0x%x:%x:%x:%x\n", pdev, pdev->bus->number,
1316 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq);
1317 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++) 1301 for ( rc = 0; rc < DEVICE_COUNT_RESOURCE; rc++)
1318 if (pci_resource_len(pdev, rc) > 0) 1302 if (pci_resource_len(pdev, rc) > 0)
1319 dbg("pci resource[%d] start=0x%lx(len=0x%lx)\n", rc, 1303 dbg("pci resource[%d] start=0x%lx(len=0x%lx)\n", rc,
@@ -1331,7 +1315,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1331 1315
1332 /* find the IRQ */ 1316 /* find the IRQ */
1333 php_ctlr->irq = dev->irq; 1317 php_ctlr->irq = dev->irq;
1334 dbg("HPC interrupt = %d\n", php_ctlr->irq);
1335 1318
1336 /* Save interrupt callback info */ 1319 /* Save interrupt callback info */
1337 php_ctlr->attention_button_callback = pciehp_handle_attention_button; 1320 php_ctlr->attention_button_callback = pciehp_handle_attention_button;
@@ -1359,15 +1342,12 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1359 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1342 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1360 goto abort_free_ctlr; 1343 goto abort_free_ctlr;
1361 } 1344 }
1362 dbg("%s : Mask HPIE hp_register_write_word SLOT_CTRL %x\n", __FUNCTION__, temp_word);
1363 1345
1364 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1346 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1365 if (rc) { 1347 if (rc) {
1366 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1348 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1367 goto abort_free_ctlr; 1349 goto abort_free_ctlr;
1368 } 1350 }
1369 dbg("%s: Mask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base)
1370 , slot_status);
1371 1351
1372 temp_word = 0x1F; /* Clear all events */ 1352 temp_word = 0x1F; /* Clear all events */
1373 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1353 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
@@ -1375,7 +1355,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1375 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1355 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1376 goto abort_free_ctlr; 1356 goto abort_free_ctlr;
1377 } 1357 }
1378 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1379 1358
1380 if (pciehp_poll_mode) {/* Install interrupt polling code */ 1359 if (pciehp_poll_mode) {/* Install interrupt polling code */
1381 /* Install and start the interrupt polling timer */ 1360 /* Install and start the interrupt polling timer */
@@ -1391,13 +1370,14 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1391 } 1370 }
1392 } 1371 }
1393 1372
1373 dbg("pciehp ctrl b:d:f:irq=0x%x:%x:%x:%x\n", pdev->bus->number,
1374 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), dev->irq);
1375
1394 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word); 1376 rc = hp_register_read_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
1395 if (rc) { 1377 if (rc) {
1396 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__); 1378 err("%s : hp_register_read_word SLOT_CTRL failed\n", __FUNCTION__);
1397 goto abort_free_ctlr; 1379 goto abort_free_ctlr;
1398 } 1380 }
1399 dbg("%s: SLOT_CTRL %x value read %x\n", __FUNCTION__, SLOT_CTRL(ctrl->cap_base), temp_word);
1400 dbg("%s: slot_cap %x\n", __FUNCTION__, slot_cap);
1401 1381
1402 intr_enable = intr_enable | PRSN_DETECT_ENABLE; 1382 intr_enable = intr_enable | PRSN_DETECT_ENABLE;
1403 1383
@@ -1417,7 +1397,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1417 } else { 1397 } else {
1418 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE; 1398 temp_word = (temp_word & ~HP_INTR_ENABLE) | HP_INTR_ENABLE;
1419 } 1399 }
1420 dbg("%s: temp_word %x\n", __FUNCTION__, temp_word);
1421 1400
1422 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */ 1401 /* Unmask Hot-plug Interrupt Enable for the interrupt notification mechanism case */
1423 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word); 1402 rc = hp_register_write_word(pdev, SLOT_CTRL(ctrl->cap_base), temp_word);
@@ -1425,14 +1404,11 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1425 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__); 1404 err("%s : hp_register_write_word SLOT_CTRL failed\n", __FUNCTION__);
1426 goto abort_free_ctlr; 1405 goto abort_free_ctlr;
1427 } 1406 }
1428 dbg("%s : Unmask HPIE hp_register_write_word SLOT_CTRL with %x\n", __FUNCTION__, temp_word);
1429 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status); 1407 rc = hp_register_read_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), slot_status);
1430 if (rc) { 1408 if (rc) {
1431 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__); 1409 err("%s : hp_register_read_word SLOT_STATUS failed\n", __FUNCTION__);
1432 goto abort_free_ctlr; 1410 goto abort_free_ctlr;
1433 } 1411 }
1434 dbg("%s: Unmask HPIE SLOT_STATUS offset %x reads slot_status %x\n", __FUNCTION__,
1435 SLOT_STATUS(ctrl->cap_base), slot_status);
1436 1412
1437 temp_word = 0x1F; /* Clear all events */ 1413 temp_word = 0x1F; /* Clear all events */
1438 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word); 1414 rc = hp_register_write_word(php_ctlr->pci_dev, SLOT_STATUS(ctrl->cap_base), temp_word);
@@ -1440,7 +1416,6 @@ int pcie_init(struct controller * ctrl, struct pcie_device *dev)
1440 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__); 1416 err("%s : hp_register_write_word SLOT_STATUS failed\n", __FUNCTION__);
1441 goto abort_free_ctlr; 1417 goto abort_free_ctlr;
1442 } 1418 }
1443 dbg("%s: SLOT_STATUS offset %x writes slot_status %x\n", __FUNCTION__, SLOT_STATUS(ctrl->cap_base), temp_word);
1444 1419
1445 rc = get_hp_hw_control_from_firmware(ctrl->pci_dev); 1420 rc = get_hp_hw_control_from_firmware(ctrl->pci_dev);
1446 if (rc) 1421 if (rc)