diff options
author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2008-04-25 17:39:06 -0400 |
---|---|---|
committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2008-04-25 17:39:06 -0400 |
commit | ae416e6b2936fdb70aeee6eb9066115d4521daa6 (patch) | |
tree | 697673ed483f1d39e654b54081eb5306df41e91a /drivers/pci/hotplug/pciehp_hpc.c | |
parent | c27fb883dffe11aa4cb35ecea1fa1832ba45d4da (diff) |
pciehp: Fix wrong slot capability check
Current pciehp saves only 8bits of Slot Capability registers in
ctrl->ctrlcap. But it refers more than 8bit for checking EMI capability.
It is clearly a bug and EMI would never work. To fix this problem,
this patch saves full Slot Capability contens in ctrl->slot_cap. It also
reduce the redundant reads of Slot Capability register. And this pach
also cleans up the macros to check the slot capabilitys (e.g. MRL_SENS(),
and so on).
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
-rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index 7104a15e2661..58f8018970fa 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -1058,11 +1058,11 @@ int pcie_init_hardware_part2(struct controller *ctrl, struct pcie_device *dev) | |||
1058 | } | 1058 | } |
1059 | 1059 | ||
1060 | cmd = PRSN_DETECT_ENABLE; | 1060 | cmd = PRSN_DETECT_ENABLE; |
1061 | if (ATTN_BUTTN(ctrl->ctrlcap)) | 1061 | if (ATTN_BUTTN(ctrl)) |
1062 | cmd |= ATTN_BUTTN_ENABLE; | 1062 | cmd |= ATTN_BUTTN_ENABLE; |
1063 | if (POWER_CTRL(ctrl->ctrlcap)) | 1063 | if (POWER_CTRL(ctrl)) |
1064 | cmd |= PWR_FAULT_DETECT_ENABLE; | 1064 | cmd |= PWR_FAULT_DETECT_ENABLE; |
1065 | if (MRL_SENS(ctrl->ctrlcap)) | 1065 | if (MRL_SENS(ctrl)) |
1066 | cmd |= MRL_DETECT_ENABLE; | 1066 | cmd |= MRL_DETECT_ENABLE; |
1067 | if (!pciehp_poll_mode) | 1067 | if (!pciehp_poll_mode) |
1068 | cmd |= HP_INTR_ENABLE; | 1068 | cmd |= HP_INTR_ENABLE; |
@@ -1181,7 +1181,7 @@ int pcie_init(struct controller *ctrl, struct pcie_device *dev) | |||
1181 | ctrl->slot_device_offset = 0; | 1181 | ctrl->slot_device_offset = 0; |
1182 | ctrl->num_slots = 1; | 1182 | ctrl->num_slots = 1; |
1183 | ctrl->first_slot = slot_cap >> 19; | 1183 | ctrl->first_slot = slot_cap >> 19; |
1184 | ctrl->ctrlcap = slot_cap & 0x0000007f; | 1184 | ctrl->slot_cap = slot_cap; |
1185 | 1185 | ||
1186 | rc = pcie_init_hardware_part1(ctrl, dev); | 1186 | rc = pcie_init_hardware_part1(ctrl, dev); |
1187 | if (rc) | 1187 | if (rc) |