diff options
| author | Eric Brower <ebrower@nvidia.com> | 2013-11-18 17:55:06 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-12-07 17:39:06 -0500 |
| commit | 17bd86c69cea4a8364e2ef8a49947dd9d5e26f13 (patch) | |
| tree | 3e0dcdaa40bd1fc7744a5bf0c21158088ba7ea6a /drivers/pci/host | |
| parent | 6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff) | |
PCI: Disable Gen2 for Tegra20 and Tegra30
Tegra20 and Tegra30 do not support gen2 PCIe, so correct the
register setting to disable it.
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/pci/host')
| -rw-r--r-- | drivers/pci/host/pci-tegra.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index 0afbbbc55c81..b8ba2f794559 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c | |||
| @@ -805,7 +805,7 @@ static int tegra_pcie_enable_controller(struct tegra_pcie *pcie) | |||
| 805 | afi_writel(pcie, value, AFI_PCIE_CONFIG); | 805 | afi_writel(pcie, value, AFI_PCIE_CONFIG); |
| 806 | 806 | ||
| 807 | value = afi_readl(pcie, AFI_FUSE); | 807 | value = afi_readl(pcie, AFI_FUSE); |
| 808 | value &= ~AFI_FUSE_PCIE_T0_GEN2_DIS; | 808 | value |= AFI_FUSE_PCIE_T0_GEN2_DIS; |
| 809 | afi_writel(pcie, value, AFI_FUSE); | 809 | afi_writel(pcie, value, AFI_FUSE); |
| 810 | 810 | ||
| 811 | /* initialize internal PHY, enable up to 16 PCIE lanes */ | 811 | /* initialize internal PHY, enable up to 16 PCIE lanes */ |