PCI: imx6: Factor out link up wait loop

Split the function that waits for the PCIe link to come up from the rest if
the host init function.  We will find this change useful in the subsequent
patch, since this will be called twice then.

No functional change.

[bhelgaas: remove useless "return;"]
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Frank Li <lznuaa@gmail.com>
Cc: Harro Haan <hrhaan@gmail.com>
Cc: Jingoo Han <jg1.han@samsung.com>
Cc: Mohit KUMAR <Mohit.KUMAR@st.com>
Cc: Pratyush Anand <pratyush.anand@st.com>
Cc: Richard Zhu <r65037@freescale.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Sean Cross <xobs@kosagi.com>
Cc: Siva Reddy Kallam <siva.kallam@samsung.com>
Cc: Srikanth T Shivanand <ts.srikanth@samsung.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Yinghai Lu <yinghai@kernel.org>

1 files changed, 20 insertions, 14 deletions

diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index 25dde2c7b445..d81da4556c19 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -304,6 +304,25 @@ static void imx6_pcie_init_phy(struct pcie_port *pp)
                         IMX6Q_GPR8_TX_SWING_LOW, 127 << 25);
 }
 
+static int imx6_pcie_wait_for_link(struct pcie_port *pp)
+{
+        int count = 200;
+
+        while (!dw_pcie_link_up(pp)) {
+                usleep_range(100, 1000);
+                if (--count)
+                        continue;
+
+                dev_err(pp->dev, "phy link never came up\n");
+                dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
+                        readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),
+                        readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));
+                return -EINVAL;
+        }
+
+        return 0;
+}
+
 static void imx6_pcie_host_init(struct pcie_port *pp)
 {
         int count = 0;
@@ -320,20 +339,7 @@ static void imx6_pcie_host_init(struct pcie_port *pp)
         regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
                         IMX6Q_GPR12_PCIE_CTL_2, 1 << 10);
 
-        while (!dw_pcie_link_up(pp)) {
-                usleep_range(100, 1000);
-                count++;
-                if (count >= 200) {
-                        dev_err(pp->dev, "phy link never came up\n");
-                        dev_dbg(pp->dev,
-                                "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
-                                readl(pp->dbi_base + PCIE_PHY_DEBUG_R0),
-                                readl(pp->dbi_base + PCIE_PHY_DEBUG_R1));
-                        break;
-                }
-        }
-
-        return;
+        imx6_pcie_wait_for_link(pp);
 }
 
 static void imx6_pcie_reset_phy(struct pcie_port *pp)