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authorFenghua Yu <fenghua.yu@intel.com>2008-10-16 21:02:32 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2008-10-18 09:29:15 -0400
commit5b6985ce8ec7127b4d60ad450b64ca8b82748a3b (patch)
treef1d5a27601df04a3481690a1a2f90fc688034aff /drivers/pci/dmar.c
parentcacd4213d8ffed83676f38d5d8e93c673e0f1af7 (diff)
intel-iommu: IA64 support
The current Intel IOMMU code assumes that both host page size and Intel IOMMU page size are 4KiB. The first patch supports variable page size. This provides support for IA64 which has multiple page sizes. This patch also adds some other code hooks for IA64 platform including DMAR_OPERATION_TIMEOUT definition. [dwmw2: some cleanup] Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/dmar.c')
-rw-r--r--drivers/pci/dmar.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 44d6c7081b8f..b65173828bc2 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -277,14 +277,15 @@ dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
277 drhd = (struct acpi_dmar_hardware_unit *)header; 277 drhd = (struct acpi_dmar_hardware_unit *)header;
278 printk (KERN_INFO PREFIX 278 printk (KERN_INFO PREFIX
279 "DRHD (flags: 0x%08x)base: 0x%016Lx\n", 279 "DRHD (flags: 0x%08x)base: 0x%016Lx\n",
280 drhd->flags, drhd->address); 280 drhd->flags, (unsigned long long)drhd->address);
281 break; 281 break;
282 case ACPI_DMAR_TYPE_RESERVED_MEMORY: 282 case ACPI_DMAR_TYPE_RESERVED_MEMORY:
283 rmrr = (struct acpi_dmar_reserved_memory *)header; 283 rmrr = (struct acpi_dmar_reserved_memory *)header;
284 284
285 printk (KERN_INFO PREFIX 285 printk (KERN_INFO PREFIX
286 "RMRR base: 0x%016Lx end: 0x%016Lx\n", 286 "RMRR base: 0x%016Lx end: 0x%016Lx\n",
287 rmrr->base_address, rmrr->end_address); 287 (unsigned long long)rmrr->base_address,
288 (unsigned long long)rmrr->end_address);
288 break; 289 break;
289 } 290 }
290} 291}
@@ -304,7 +305,7 @@ parse_dmar_table(void)
304 if (!dmar) 305 if (!dmar)
305 return -ENODEV; 306 return -ENODEV;
306 307
307 if (dmar->width < PAGE_SHIFT_4K - 1) { 308 if (dmar->width < PAGE_SHIFT - 1) {
308 printk(KERN_WARNING PREFIX "Invalid DMAR haw\n"); 309 printk(KERN_WARNING PREFIX "Invalid DMAR haw\n");
309 return -EINVAL; 310 return -EINVAL;
310 } 311 }
@@ -493,7 +494,7 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
493 494
494 iommu->seq_id = iommu_allocated++; 495 iommu->seq_id = iommu_allocated++;
495 496
496 iommu->reg = ioremap(drhd->reg_base_addr, PAGE_SIZE_4K); 497 iommu->reg = ioremap(drhd->reg_base_addr, VTD_PAGE_SIZE);
497 if (!iommu->reg) { 498 if (!iommu->reg) {
498 printk(KERN_ERR "IOMMU: can't map the region\n"); 499 printk(KERN_ERR "IOMMU: can't map the region\n");
499 goto error; 500 goto error;
@@ -504,8 +505,8 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
504 /* the registers might be more than one page */ 505 /* the registers might be more than one page */
505 map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap), 506 map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
506 cap_max_fault_reg_offset(iommu->cap)); 507 cap_max_fault_reg_offset(iommu->cap));
507 map_size = PAGE_ALIGN_4K(map_size); 508 map_size = VTD_PAGE_ALIGN(map_size);
508 if (map_size > PAGE_SIZE_4K) { 509 if (map_size > VTD_PAGE_SIZE) {
509 iounmap(iommu->reg); 510 iounmap(iommu->reg);
510 iommu->reg = ioremap(drhd->reg_base_addr, map_size); 511 iommu->reg = ioremap(drhd->reg_base_addr, map_size);
511 if (!iommu->reg) { 512 if (!iommu->reg) {
@@ -516,8 +517,10 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
516 517
517 ver = readl(iommu->reg + DMAR_VER_REG); 518 ver = readl(iommu->reg + DMAR_VER_REG);
518 pr_debug("IOMMU %llx: ver %d:%d cap %llx ecap %llx\n", 519 pr_debug("IOMMU %llx: ver %d:%d cap %llx ecap %llx\n",
519 drhd->reg_base_addr, DMAR_VER_MAJOR(ver), DMAR_VER_MINOR(ver), 520 (unsigned long long)drhd->reg_base_addr,
520 iommu->cap, iommu->ecap); 521 DMAR_VER_MAJOR(ver), DMAR_VER_MINOR(ver),
522 (unsigned long long)iommu->cap,
523 (unsigned long long)iommu->ecap);
521 524
522 spin_lock_init(&iommu->register_lock); 525 spin_lock_init(&iommu->register_lock);
523 526