x64, x2apic/intr-remap: fix the need for sequential array allocation of iommus

Clean up the intel-iommu code related to deferred iommu flush logic. There is
no need to allocate all the iommu's as a sequential array.

This will be used later in the interrupt-remapping patch series to
allocate iommu much early and individually for each device remapping
hardware unit.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: akpm@linux-foundation.org
Cc: arjan@linux.intel.com
Cc: andi@firstfloor.org
Cc: ebiederm@xmission.com
Cc: jbarnes@virtuousgeek.org
Cc: steiner@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 9 insertions, 2 deletions

diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index c00e387f5b75..1a59423a8eda 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -377,11 +377,18 @@ int __init early_dmar_detect(void)
         return (ACPI_SUCCESS(status) ? 1 : 0);
 }
 
-struct intel_iommu *alloc_iommu(struct intel_iommu *iommu,
-                                struct dmar_drhd_unit *drhd)
+struct intel_iommu *alloc_iommu(struct dmar_drhd_unit *drhd)
 {
+        struct intel_iommu *iommu;
         int map_size;
         u32 ver;
+        static int iommu_allocated = 0;
+
+        iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
+        if (!iommu)
+                return NULL;
+
+        iommu->seq_id = iommu_allocated++;
 
         iommu->reg = ioremap(drhd->reg_base_addr, PAGE_SIZE_4K);
         if (!iommu->reg) {