diff options
author | David Woodhouse <David.Woodhouse@intel.com> | 2009-05-10 15:30:58 -0400 |
---|---|---|
committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-05-10 15:32:37 -0400 |
commit | c416daa98a584596df21ee2c26fac6579ee58f57 (patch) | |
tree | 161a5aaf1e63a14ce8895046139c2ce695b89531 /drivers/pci/dmar.c | |
parent | 462b60f6ccc685f7e8aa04ff430e6b4ffedf629f (diff) |
intel-iommu: Tidy up iommu->gcmd handling
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/dmar.c')
-rw-r--r-- | drivers/pci/dmar.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c index df6af0d4ec03..faf77a00cafe 100644 --- a/drivers/pci/dmar.c +++ b/drivers/pci/dmar.c | |||
@@ -784,7 +784,6 @@ void dmar_disable_qi(struct intel_iommu *iommu) | |||
784 | cpu_relax(); | 784 | cpu_relax(); |
785 | 785 | ||
786 | iommu->gcmd &= ~DMA_GCMD_QIE; | 786 | iommu->gcmd &= ~DMA_GCMD_QIE; |
787 | |||
788 | writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); | 787 | writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); |
789 | 788 | ||
790 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, | 789 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, |
@@ -798,7 +797,7 @@ end: | |||
798 | */ | 797 | */ |
799 | static void __dmar_enable_qi(struct intel_iommu *iommu) | 798 | static void __dmar_enable_qi(struct intel_iommu *iommu) |
800 | { | 799 | { |
801 | u32 cmd, sts; | 800 | u32 sts; |
802 | unsigned long flags; | 801 | unsigned long flags; |
803 | struct q_inval *qi = iommu->qi; | 802 | struct q_inval *qi = iommu->qi; |
804 | 803 | ||
@@ -812,9 +811,8 @@ static void __dmar_enable_qi(struct intel_iommu *iommu) | |||
812 | 811 | ||
813 | dmar_writeq(iommu->reg + DMAR_IQA_REG, virt_to_phys(qi->desc)); | 812 | dmar_writeq(iommu->reg + DMAR_IQA_REG, virt_to_phys(qi->desc)); |
814 | 813 | ||
815 | cmd = iommu->gcmd | DMA_GCMD_QIE; | ||
816 | iommu->gcmd |= DMA_GCMD_QIE; | 814 | iommu->gcmd |= DMA_GCMD_QIE; |
817 | writel(cmd, iommu->reg + DMAR_GCMD_REG); | 815 | writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG); |
818 | 816 | ||
819 | /* Make sure hardware complete it */ | 817 | /* Make sure hardware complete it */ |
820 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, (sts & DMA_GSTS_QIES), sts); | 818 | IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG, readl, (sts & DMA_GSTS_QIES), sts); |