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authorDavid S. Miller <davem@sunset.davemloft.net>2007-02-10 20:41:02 -0500
committerDavid S. Miller <davem@sunset.davemloft.net>2007-02-11 02:50:37 -0500
commit35a17eb6a87c9ceb0d35dcb51f464fe6faf584ab (patch)
tree7f56095a56e9f62dca7514cdfe781739548011f5 /drivers/pci/Kconfig
parent68c921869491c119142612fa5796c9f8b4e9970b (diff)
[SPARC64]: Add PCI MSI support on Niagara.
This is kind of hokey, we could use the hardware provided facilities much better. MSIs are assosciated with MSI Queues. MSI Queues generate interrupts when any MSI assosciated with it is signalled. This suggests a two-tiered IRQ dispatch scheme: MSI Queue interrupt --> queue interrupt handler MSI dispatch --> driver interrupt handler But we just get one-level under Linux currently. What I'd like to do is possibly stick the IRQ actions into a per-MSI-Queue data structure, and dispatch them form there, but the generic IRQ layer doesn't provide a way to do that right now. So, the current kludge is to "ACK" the interrupt by processing the MSI Queue data structures and ACK'ing them, then we run the actual handler like normal. We are wasting a lot of useful information, for example the MSI data and address are provided with ever MSI, as well as a system tick if available. If we could pass this into the IRQ handler it could help with certain things, in particular for PCI-Express error messages. The MSI entries on sparc64 also tell you exactly which bus/device/fn sent the MSI, which would be great for error handling when no registered IRQ handler can service the interrupt. We override the disable/enable IRQ chip methods in sun4v_msi, so we have to call {mask,unmask}_msi_irq() directly from there. This is another ugly wart. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/pci/Kconfig')
-rw-r--r--drivers/pci/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 3cfb0a3575e6..5ea5bc70cb82 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -4,7 +4,7 @@
4config PCI_MSI 4config PCI_MSI
5 bool "Message Signaled Interrupts (MSI and MSI-X)" 5 bool "Message Signaled Interrupts (MSI and MSI-X)"
6 depends on PCI 6 depends on PCI
7 depends on (X86_LOCAL_APIC && X86_IO_APIC) || IA64 7 depends on (X86_LOCAL_APIC && X86_IO_APIC) || IA64 || SPARC64
8 help 8 help
9 This allows device drivers to enable MSI (Message Signaled 9 This allows device drivers to enable MSI (Message Signaled
10 Interrupts). Message Signaled Interrupts enable a device to 10 Interrupts). Message Signaled Interrupts enable a device to