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authorKyle McMartin <kyle@dreadnought.i.jkkm.org>2010-10-14 00:38:27 -0400
committerKyle McMartin <kyle@dreadnought.i.jkkm.org>2010-10-14 01:30:16 -0400
commitf3d4605977f9f30993c670a85f75d8f3853144c5 (patch)
tree02e63b1b9a3f5ff039e9946371e39fca389eb1d5 /drivers/parisc
parent4d4f681dc43a06167763ec698f5de4f2b3119ad6 (diff)
parisc: convert iosapic interrupts to proper flow handlers
Shift the ->end call (cpu eoi) from __do_IRQ into our unmask handler. Also nuke some redundant code. Signed-off-by: Kyle McMartin <kyle@redhat.com>
Diffstat (limited to 'drivers/parisc')
-rw-r--r--drivers/parisc/iosapic.c37
1 files changed, 6 insertions, 31 deletions
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index 13020881d08a..edab2941e1d5 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -615,7 +615,7 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1)
615} 615}
616 616
617 617
618static void iosapic_disable_irq(unsigned int irq) 618static void iosapic_mask_irq(unsigned int irq)
619{ 619{
620 unsigned long flags; 620 unsigned long flags;
621 struct vector_info *vi = get_irq_chip_data(irq); 621 struct vector_info *vi = get_irq_chip_data(irq);
@@ -628,7 +628,7 @@ static void iosapic_disable_irq(unsigned int irq)
628 spin_unlock_irqrestore(&iosapic_lock, flags); 628 spin_unlock_irqrestore(&iosapic_lock, flags);
629} 629}
630 630
631static void iosapic_enable_irq(unsigned int irq) 631static void iosapic_unmask_irq(unsigned int irq)
632{ 632{
633 struct vector_info *vi = get_irq_chip_data(irq); 633 struct vector_info *vi = get_irq_chip_data(irq);
634 u32 d0, d1; 634 u32 d0, d1;
@@ -669,31 +669,9 @@ printk("\n");
669 DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq, 669 DBG(KERN_DEBUG "enable_irq(%d): eoi(%p, 0x%x)\n", irq,
670 vi->eoi_addr, vi->eoi_data); 670 vi->eoi_addr, vi->eoi_data);
671 iosapic_eoi(vi->eoi_addr, vi->eoi_data); 671 iosapic_eoi(vi->eoi_addr, vi->eoi_data);
672}
673
674/*
675 * PARISC only supports PCI devices below I/O SAPIC.
676 * PCI only supports level triggered in order to share IRQ lines.
677 * ergo I/O SAPIC must always issue EOI on parisc.
678 *
679 * i386/ia64 support ISA devices and have to deal with
680 * edge-triggered interrupts too.
681 */
682static void iosapic_end_irq(unsigned int irq)
683{
684 struct vector_info *vi = get_irq_chip_data(irq);
685 DBG(KERN_DEBUG "end_irq(%d): eoi(%p, 0x%x)\n", irq,
686 vi->eoi_addr, vi->eoi_data);
687 iosapic_eoi(vi->eoi_addr, vi->eoi_data);
688 cpu_eoi_irq(irq); 672 cpu_eoi_irq(irq);
689} 673}
690 674
691static unsigned int iosapic_startup_irq(unsigned int irq)
692{
693 iosapic_enable_irq(irq);
694 return 0;
695}
696
697#ifdef CONFIG_SMP 675#ifdef CONFIG_SMP
698static int iosapic_set_affinity_irq(unsigned int irq, 676static int iosapic_set_affinity_irq(unsigned int irq,
699 const struct cpumask *dest) 677 const struct cpumask *dest)
@@ -723,13 +701,10 @@ static int iosapic_set_affinity_irq(unsigned int irq,
723#endif 701#endif
724 702
725static struct irq_chip iosapic_interrupt_type = { 703static struct irq_chip iosapic_interrupt_type = {
726 .name = "IO-SAPIC-level", 704 .name = "IO-SAPIC-level",
727 .startup = iosapic_startup_irq, 705 .unmask = iosapic_unmask_irq,
728 .shutdown = iosapic_disable_irq, 706 .mask = iosapic_mask_irq,
729 .enable = iosapic_enable_irq, 707 .ack = cpu_ack_irq,
730 .disable = iosapic_disable_irq,
731 .ack = cpu_ack_irq,
732 .end = iosapic_end_irq,
733#ifdef CONFIG_SMP 708#ifdef CONFIG_SMP
734 .set_affinity = iosapic_set_affinity_irq, 709 .set_affinity = iosapic_set_affinity_irq,
735#endif 710#endif