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author | Kristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com> | 2007-08-08 10:57:08 -0400 |
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committer | Jeff Garzik <jeff@garzik.org> | 2007-10-12 14:55:37 -0400 |
commit | 7c9ef8e418374aec0a62e64d9b40d457634fd039 (patch) | |
tree | 6a9c30266aa97b38515647cdc404cb7d3c512e15 /drivers/parisc/lba_pci.c | |
parent | d830d1731fa5906aad20c228ac8b73005b13d468 (diff) |
AVR32 PATA driver
Updated and simplified driver. Use only register transfer timing for both
data and register transfers. This gives poorer performance in PIO1 and 2,
but should not be a problem in PIO3 and 4, correct me if I'm wrong :)
The driver works very we'll but I still wonder about the interrupts. I have
an interrupt line, that works nicely when POLLING flag is not set. The
problem is the number of interrupts that eat away my CPU cycles.
When using the POLLING flag there seem to be some interrupts that dosen't get
cleared. Furthermore the device dosen't drive INTRQ high, it stays at 2.5 volts
and generates a lot of interrupts due to ripple / noise. What to do?
Signed-off-by: Kristoffer Nyborg Gregertsen <kngregertsen@norway.atmel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/parisc/lba_pci.c')
0 files changed, 0 insertions, 0 deletions