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authorHarvey Harrison <harvey.harrison@gmail.com>2008-05-14 19:21:56 -0400
committerKyle McMartin <kyle@mcmartin.ca>2008-05-15 10:38:54 -0400
commita8043ecb17bd2e4b034006bee315efeea3936278 (patch)
treedb1780acb16d95cc619d901bd9f850c5cae45c50 /drivers/parisc/lba_pci.c
parent91bae23ce185b74c9b6dda86b92bb204a1c951c3 (diff)
drivers/parisc: replace remaining __FUNCTION__ occurrences
__FUNCTION__ is gcc-specific, use __func__ Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Kyle McMartin <kyle@mcmartin.ca>
Diffstat (limited to 'drivers/parisc/lba_pci.c')
-rw-r--r--drivers/parisc/lba_pci.c22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index 66ce61048361..a28c8946deaa 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -377,12 +377,12 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
377 /* original - Generate config cycle on broken elroy 377 /* original - Generate config cycle on broken elroy
378 with risk we will miss PCI bus errors. */ 378 with risk we will miss PCI bus errors. */
379 *data = lba_rd_cfg(d, tok, pos, size); 379 *data = lba_rd_cfg(d, tok, pos, size);
380 DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __FUNCTION__, tok, pos, *data); 380 DBG_CFG("%s(%x+%2x) -> 0x%x (a)\n", __func__, tok, pos, *data);
381 return 0; 381 return 0;
382 } 382 }
383 383
384 if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->secondary, devfn, d)) { 384 if (LBA_SKIP_PROBE(d) && !lba_device_present(bus->secondary, devfn, d)) {
385 DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __FUNCTION__, tok, pos); 385 DBG_CFG("%s(%x+%2x) -> -1 (b)\n", __func__, tok, pos);
386 /* either don't want to look or know device isn't present. */ 386 /* either don't want to look or know device isn't present. */
387 *data = ~0U; 387 *data = ~0U;
388 return(0); 388 return(0);
@@ -398,7 +398,7 @@ static int elroy_cfg_read(struct pci_bus *bus, unsigned int devfn, int pos, int
398 case 2: *data = READ_REG16(data_reg + (pos & 2)); break; 398 case 2: *data = READ_REG16(data_reg + (pos & 2)); break;
399 case 4: *data = READ_REG32(data_reg); break; 399 case 4: *data = READ_REG32(data_reg); break;
400 } 400 }
401 DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __FUNCTION__, tok, pos, *data); 401 DBG_CFG("%s(%x+%2x) -> 0x%x (c)\n", __func__, tok, pos, *data);
402 return 0; 402 return 0;
403} 403}
404 404
@@ -441,16 +441,16 @@ static int elroy_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, int
441 if (!LBA_SKIP_PROBE(d)) { 441 if (!LBA_SKIP_PROBE(d)) {
442 /* Original Workaround */ 442 /* Original Workaround */
443 lba_wr_cfg(d, tok, pos, (u32) data, size); 443 lba_wr_cfg(d, tok, pos, (u32) data, size);
444 DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __FUNCTION__, tok, pos,data); 444 DBG_CFG("%s(%x+%2x) = 0x%x (a)\n", __func__, tok, pos,data);
445 return 0; 445 return 0;
446 } 446 }
447 447
448 if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->secondary, devfn, d))) { 448 if (LBA_SKIP_PROBE(d) && (!lba_device_present(bus->secondary, devfn, d))) {
449 DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __FUNCTION__, tok, pos,data); 449 DBG_CFG("%s(%x+%2x) = 0x%x (b)\n", __func__, tok, pos,data);
450 return 1; /* New Workaround */ 450 return 1; /* New Workaround */
451 } 451 }
452 452
453 DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __FUNCTION__, tok, pos, data); 453 DBG_CFG("%s(%x+%2x) = 0x%x (c)\n", __func__, tok, pos, data);
454 454
455 /* Basic Algorithm */ 455 /* Basic Algorithm */
456 LBA_CFG_ADDR_SETUP(d, tok | pos); 456 LBA_CFG_ADDR_SETUP(d, tok | pos);
@@ -521,7 +521,7 @@ static int mercury_cfg_write(struct pci_bus *bus, unsigned int devfn, int pos, i
521 if ((pos > 255) || (devfn > 255)) 521 if ((pos > 255) || (devfn > 255))
522 return -EINVAL; 522 return -EINVAL;
523 523
524 DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __FUNCTION__, tok, pos, data); 524 DBG_CFG("%s(%x+%2x) <- 0x%x (c)\n", __func__, tok, pos, data);
525 525
526 LBA_CFG_TR4_ADDR_SETUP(d, tok | pos); 526 LBA_CFG_TR4_ADDR_SETUP(d, tok | pos);
527 switch(size) { 527 switch(size) {
@@ -890,7 +890,7 @@ LBA_PORT_IN(32, 0)
890#define LBA_PORT_OUT(size, mask) \ 890#define LBA_PORT_OUT(size, mask) \
891static void lba_astro_out##size (struct pci_hba_data *d, u16 addr, u##size val) \ 891static void lba_astro_out##size (struct pci_hba_data *d, u16 addr, u##size val) \
892{ \ 892{ \
893 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, d, addr, val); \ 893 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, d, addr, val); \
894 WRITE_REG##size(val, astro_iop_base + addr); \ 894 WRITE_REG##size(val, astro_iop_base + addr); \
895 if (LBA_DEV(d)->hw_rev < 3) \ 895 if (LBA_DEV(d)->hw_rev < 3) \
896 lba_t32 = READ_U32(d->base_addr + LBA_FUNC_ID); \ 896 lba_t32 = READ_U32(d->base_addr + LBA_FUNC_ID); \
@@ -932,7 +932,7 @@ static struct pci_port_ops lba_astro_port_ops = {
932static u##size lba_pat_in##size (struct pci_hba_data *l, u16 addr) \ 932static u##size lba_pat_in##size (struct pci_hba_data *l, u16 addr) \
933{ \ 933{ \
934 u##size t; \ 934 u##size t; \
935 DBG_PORT("%s(0x%p, 0x%x) ->", __FUNCTION__, l, addr); \ 935 DBG_PORT("%s(0x%p, 0x%x) ->", __func__, l, addr); \
936 t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \ 936 t = READ_REG##size(PIOP_TO_GMMIO(LBA_DEV(l), addr)); \
937 DBG_PORT(" 0x%x\n", t); \ 937 DBG_PORT(" 0x%x\n", t); \
938 return (t); \ 938 return (t); \
@@ -948,7 +948,7 @@ LBA_PORT_IN(32, 0)
948static void lba_pat_out##size (struct pci_hba_data *l, u16 addr, u##size val) \ 948static void lba_pat_out##size (struct pci_hba_data *l, u16 addr, u##size val) \
949{ \ 949{ \
950 void __iomem *where = PIOP_TO_GMMIO(LBA_DEV(l), addr); \ 950 void __iomem *where = PIOP_TO_GMMIO(LBA_DEV(l), addr); \
951 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __FUNCTION__, l, addr, val); \ 951 DBG_PORT("%s(0x%p, 0x%x, 0x%x)\n", __func__, l, addr, val); \
952 WRITE_REG##size(val, where); \ 952 WRITE_REG##size(val, where); \
953 /* flush the I/O down to the elroy at least */ \ 953 /* flush the I/O down to the elroy at least */ \
954 lba_t32 = READ_U32(l->base_addr + LBA_FUNC_ID); \ 954 lba_t32 = READ_U32(l->base_addr + LBA_FUNC_ID); \
@@ -1584,7 +1584,7 @@ void lba_set_iregs(struct parisc_device *lba, u32 ibase, u32 imask)
1584 WARN_ON((ibase & 0x001fffff) != 0); 1584 WARN_ON((ibase & 0x001fffff) != 0);
1585 WARN_ON((imask & 0x001fffff) != 0); 1585 WARN_ON((imask & 0x001fffff) != 0);
1586 1586
1587 DBG("%s() ibase 0x%x imask 0x%x\n", __FUNCTION__, ibase, imask); 1587 DBG("%s() ibase 0x%x imask 0x%x\n", __func__, ibase, imask);
1588 WRITE_REG32( imask, base_addr + LBA_IMASK); 1588 WRITE_REG32( imask, base_addr + LBA_IMASK);
1589 WRITE_REG32( ibase, base_addr + LBA_IBASE); 1589 WRITE_REG32( ibase, base_addr + LBA_IBASE);
1590 iounmap(base_addr); 1590 iounmap(base_addr);