aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/parisc/iosapic.c
diff options
context:
space:
mode:
authorMatt LaPlante <kernel1@cyberdogtech.com>2006-11-29 23:24:39 -0500
committerAdrian Bunk <bunk@stusta.de>2006-11-29 23:24:39 -0500
commit0779bf2d2ecc4d9b1e9437ae659f50e6776a7666 (patch)
treedbcc9735ab63a833056572c8f4f0efe911246562 /drivers/parisc/iosapic.c
parent3cb2fccc5f48a4d6269dfd00b4db570fca2a04d5 (diff)
Fix misc .c/.h comment typos
Fix various .c/.h typos in comments (no code changes). Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'drivers/parisc/iosapic.c')
-rw-r--r--drivers/parisc/iosapic.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c
index c2949b4367e5..12bab64a62a1 100644
--- a/drivers/parisc/iosapic.c
+++ b/drivers/parisc/iosapic.c
@@ -50,12 +50,12 @@
50** 50**
51** PA Firmware 51** PA Firmware
52** ----------- 52** -----------
53** PA-RISC platforms have two fundementally different types of firmware. 53** PA-RISC platforms have two fundamentally different types of firmware.
54** For PCI devices, "Legacy" PDC initializes the "INTERRUPT_LINE" register 54** For PCI devices, "Legacy" PDC initializes the "INTERRUPT_LINE" register
55** and BARs similar to a traditional PC BIOS. 55** and BARs similar to a traditional PC BIOS.
56** The newer "PAT" firmware supports PDC calls which return tables. 56** The newer "PAT" firmware supports PDC calls which return tables.
57** PAT firmware only initializes PCI Console and Boot interface. 57** PAT firmware only initializes the PCI Console and Boot interface.
58** With these tables, the OS can progam all other PCI devices. 58** With these tables, the OS can program all other PCI devices.
59** 59**
60** One such PAT PDC call returns the "Interrupt Routing Table" (IRT). 60** One such PAT PDC call returns the "Interrupt Routing Table" (IRT).
61** The IRT maps each PCI slot's INTA-D "output" line to an I/O SAPIC 61** The IRT maps each PCI slot's INTA-D "output" line to an I/O SAPIC