diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-06-01 19:57:36 -0400 |
---|---|---|
committer | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-06-12 02:40:38 -0400 |
commit | 1e881592e0420dfb5626344a69b15ae268ee98c7 (patch) | |
tree | 6153b45b649a35f3c85bb9f9729b3866465fb215 /drivers/net | |
parent | 773fc3ee7ef47081c018c964829b660d6be9ee01 (diff) |
mv643xx_eth: detect alternate TX BW control register location
Some SoCs have the TX bandwidth control registers in a slightly
different place. This patch detects that case at run time, and
re-directs accesses to those registers to the proper place at
run time if needed.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/mv643xx_eth.c | 37 |
1 files changed, 32 insertions, 5 deletions
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 296687baccf7..72d3f36ff284 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -108,6 +108,10 @@ static char mv643xx_eth_driver_version[] = "1.0"; | |||
108 | #define INT_MASK(p) (0x0468 + ((p) << 10)) | 108 | #define INT_MASK(p) (0x0468 + ((p) << 10)) |
109 | #define INT_MASK_EXT(p) (0x046c + ((p) << 10)) | 109 | #define INT_MASK_EXT(p) (0x046c + ((p) << 10)) |
110 | #define TX_FIFO_URGENT_THRESHOLD(p) (0x0474 + ((p) << 10)) | 110 | #define TX_FIFO_URGENT_THRESHOLD(p) (0x0474 + ((p) << 10)) |
111 | #define TXQ_FIX_PRIO_CONF_MOVED(p) (0x04dc + ((p) << 10)) | ||
112 | #define TX_BW_RATE_MOVED(p) (0x04e0 + ((p) << 10)) | ||
113 | #define TX_BW_MTU_MOVED(p) (0x04e8 + ((p) << 10)) | ||
114 | #define TX_BW_BURST_MOVED(p) (0x04ec + ((p) << 10)) | ||
111 | #define RXQ_CURRENT_DESC_PTR(p, q) (0x060c + ((p) << 10) + ((q) << 4)) | 115 | #define RXQ_CURRENT_DESC_PTR(p, q) (0x060c + ((p) << 10) + ((q) << 4)) |
112 | #define RXQ_COMMAND(p) (0x0680 + ((p) << 10)) | 116 | #define RXQ_COMMAND(p) (0x0680 + ((p) << 10)) |
113 | #define TXQ_CURRENT_DESC_PTR(p, q) (0x06c0 + ((p) << 10) + ((q) << 2)) | 117 | #define TXQ_CURRENT_DESC_PTR(p, q) (0x06c0 + ((p) << 10) + ((q) << 2)) |
@@ -250,6 +254,7 @@ struct mv643xx_eth_shared_private { | |||
250 | */ | 254 | */ |
251 | unsigned int t_clk; | 255 | unsigned int t_clk; |
252 | int extended_rx_coal_limit; | 256 | int extended_rx_coal_limit; |
257 | int tx_bw_control_moved; | ||
253 | }; | 258 | }; |
254 | 259 | ||
255 | 260 | ||
@@ -831,9 +836,15 @@ static void tx_set_rate(struct mv643xx_eth_private *mp, int rate, int burst) | |||
831 | if (bucket_size > 65535) | 836 | if (bucket_size > 65535) |
832 | bucket_size = 65535; | 837 | bucket_size = 65535; |
833 | 838 | ||
834 | wrl(mp, TX_BW_RATE(mp->port_num), token_rate); | 839 | if (mp->shared->tx_bw_control_moved) { |
835 | wrl(mp, TX_BW_MTU(mp->port_num), mtu); | 840 | wrl(mp, TX_BW_RATE_MOVED(mp->port_num), token_rate); |
836 | wrl(mp, TX_BW_BURST(mp->port_num), bucket_size); | 841 | wrl(mp, TX_BW_MTU_MOVED(mp->port_num), mtu); |
842 | wrl(mp, TX_BW_BURST_MOVED(mp->port_num), bucket_size); | ||
843 | } else { | ||
844 | wrl(mp, TX_BW_RATE(mp->port_num), token_rate); | ||
845 | wrl(mp, TX_BW_MTU(mp->port_num), mtu); | ||
846 | wrl(mp, TX_BW_BURST(mp->port_num), bucket_size); | ||
847 | } | ||
837 | } | 848 | } |
838 | 849 | ||
839 | static void txq_set_rate(struct tx_queue *txq, int rate, int burst) | 850 | static void txq_set_rate(struct tx_queue *txq, int rate, int burst) |
@@ -864,7 +875,10 @@ static void txq_set_fixed_prio_mode(struct tx_queue *txq) | |||
864 | /* | 875 | /* |
865 | * Turn on fixed priority mode. | 876 | * Turn on fixed priority mode. |
866 | */ | 877 | */ |
867 | off = TXQ_FIX_PRIO_CONF(mp->port_num); | 878 | if (mp->shared->tx_bw_control_moved) |
879 | off = TXQ_FIX_PRIO_CONF_MOVED(mp->port_num); | ||
880 | else | ||
881 | off = TXQ_FIX_PRIO_CONF(mp->port_num); | ||
868 | 882 | ||
869 | val = rdl(mp, off); | 883 | val = rdl(mp, off); |
870 | val |= 1 << txq->index; | 884 | val |= 1 << txq->index; |
@@ -880,7 +894,10 @@ static void txq_set_wrr(struct tx_queue *txq, int weight) | |||
880 | /* | 894 | /* |
881 | * Turn off fixed priority mode. | 895 | * Turn off fixed priority mode. |
882 | */ | 896 | */ |
883 | off = TXQ_FIX_PRIO_CONF(mp->port_num); | 897 | if (mp->shared->tx_bw_control_moved) |
898 | off = TXQ_FIX_PRIO_CONF_MOVED(mp->port_num); | ||
899 | else | ||
900 | off = TXQ_FIX_PRIO_CONF(mp->port_num); | ||
884 | 901 | ||
885 | val = rdl(mp, off); | 902 | val = rdl(mp, off); |
886 | val &= ~(1 << txq->index); | 903 | val &= ~(1 << txq->index); |
@@ -2108,6 +2125,16 @@ static void infer_hw_params(struct mv643xx_eth_shared_private *msp) | |||
2108 | msp->extended_rx_coal_limit = 1; | 2125 | msp->extended_rx_coal_limit = 1; |
2109 | else | 2126 | else |
2110 | msp->extended_rx_coal_limit = 0; | 2127 | msp->extended_rx_coal_limit = 0; |
2128 | |||
2129 | /* | ||
2130 | * Check whether the TX rate control registers are in the | ||
2131 | * old or the new place. | ||
2132 | */ | ||
2133 | writel(1, msp->base + TX_BW_MTU_MOVED(0)); | ||
2134 | if (readl(msp->base + TX_BW_MTU_MOVED(0)) & 1) | ||
2135 | msp->tx_bw_control_moved = 1; | ||
2136 | else | ||
2137 | msp->tx_bw_control_moved = 0; | ||
2111 | } | 2138 | } |
2112 | 2139 | ||
2113 | static int mv643xx_eth_shared_probe(struct platform_device *pdev) | 2140 | static int mv643xx_eth_shared_probe(struct platform_device *pdev) |