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authorMatt Carlson <mcarlson@broadcom.com>2007-10-08 02:28:35 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:54:45 -0400
commitd30cdd28fba556143a4bb0d1a6097ebcc2891477 (patch)
tree00a6548cbd6cdf13a88427c66c520456444c3a6b /drivers/net
parent795d01c523dd9f22acc70fe86ed30e605e00024d (diff)
[TG3]: Add 5784 and 5764 support.
This patch adds the support for 5784 and 5764 devices. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/tg3.c53
-rw-r--r--drivers/net/tg3.h14
2 files changed, 55 insertions, 12 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 482b7df55247..2378ea3f357a 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -198,6 +198,8 @@ static struct pci_device_id tg3_pci_tbl[] = {
198 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781)}, 198 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781)},
199 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906)}, 199 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906)},
200 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906M)}, 200 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906M)},
201 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5784)},
202 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5764)},
201 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, 203 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)},
202 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)}, 204 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)},
203 {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)}, 205 {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)},
@@ -4921,7 +4923,8 @@ static int tg3_chip_reset(struct tg3 *tp)
4921 4923
4922 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || 4924 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
4923 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 4925 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
4924 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 4926 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
4927 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)
4925 tw32(GRC_FASTBOOT_PC, 0); 4928 tw32(GRC_FASTBOOT_PC, 0);
4926 4929
4927 /* 4930 /*
@@ -6146,6 +6149,12 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6146 6149
6147 tg3_write_sig_legacy(tp, RESET_KIND_INIT); 6150 tg3_write_sig_legacy(tp, RESET_KIND_INIT);
6148 6151
6152 if (tp->pci_chip_rev_id == CHIPREV_ID_5784_A0) {
6153 val = tr32(TG3_CPMU_CTRL);
6154 val &= ~(CPMU_CTRL_LINK_AWARE_MODE | CPMU_CTRL_LINK_IDLE_MODE);
6155 tw32(TG3_CPMU_CTRL, val);
6156 }
6157
6149 /* This works around an issue with Athlon chipsets on 6158 /* This works around an issue with Athlon chipsets on
6150 * B3 tigon3 silicon. This bit has no effect on any 6159 * B3 tigon3 silicon. This bit has no effect on any
6151 * other revision. But do not set this on PCI Express 6160 * other revision. But do not set this on PCI Express
@@ -6180,10 +6189,12 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6180 if (err) 6189 if (err)
6181 return err; 6190 return err;
6182 6191
6183 /* This value is determined during the probe time DMA 6192 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784) {
6184 * engine test, tg3_test_dma. 6193 /* This value is determined during the probe time DMA
6185 */ 6194 * engine test, tg3_test_dma.
6186 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl); 6195 */
6196 tw32(TG3PCI_DMA_RW_CTRL, tp->dma_rwctrl);
6197 }
6187 6198
6188 tp->grc_mode &= ~(GRC_MODE_HOST_SENDBDS | 6199 tp->grc_mode &= ~(GRC_MODE_HOST_SENDBDS |
6189 GRC_MODE_4X_NIC_SEND_RINGS | 6200 GRC_MODE_4X_NIC_SEND_RINGS |
@@ -6417,6 +6428,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6417 RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB | 6428 RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB |
6418 RDMAC_MODE_LNGREAD_ENAB); 6429 RDMAC_MODE_LNGREAD_ENAB);
6419 6430
6431 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)
6432 rdmac_mode |= RDMAC_MODE_BD_SBD_CRPT_ENAB |
6433 RDMAC_MODE_MBUF_RBD_CRPT_ENAB |
6434 RDMAC_MODE_MBUF_SBD_CRPT_ENAB;
6435
6420 /* If statement applies to 5705 and 5750 PCI devices only */ 6436 /* If statement applies to 5705 and 5750 PCI devices only */
6421 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && 6437 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
6422 tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) || 6438 tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) ||
@@ -6578,7 +6594,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6578 6594
6579 /* Enable host coalescing bug fix */ 6595 /* Enable host coalescing bug fix */
6580 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) || 6596 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) ||
6581 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)) 6597 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) ||
6598 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784))
6582 val |= (1 << 29); 6599 val |= (1 << 29);
6583 6600
6584 tw32_f(WDMAC_MODE, val); 6601 tw32_f(WDMAC_MODE, val);
@@ -8353,7 +8370,8 @@ static int tg3_set_tx_csum(struct net_device *dev, u32 data)
8353 } 8370 }
8354 8371
8355 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 8372 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
8356 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 8373 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
8374 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)
8357 ethtool_op_set_tx_ipv6_csum(dev, data); 8375 ethtool_op_set_tx_ipv6_csum(dev, data);
8358 else 8376 else
8359 ethtool_op_set_tx_csum(dev, data); 8377 ethtool_op_set_tx_csum(dev, data);
@@ -8849,7 +8867,8 @@ static int tg3_test_memory(struct tg3 *tp)
8849 8867
8850 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { 8868 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
8851 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 8869 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
8852 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 8870 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
8871 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)
8853 mem_tbl = mem_tbl_5755; 8872 mem_tbl = mem_tbl_5755;
8854 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 8873 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
8855 mem_tbl = mem_tbl_5906; 8874 mem_tbl = mem_tbl_5906;
@@ -9600,7 +9619,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
9600 tg3_get_5752_nvram_info(tp); 9619 tg3_get_5752_nvram_info(tp);
9601 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755) 9620 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
9602 tg3_get_5755_nvram_info(tp); 9621 tg3_get_5755_nvram_info(tp);
9603 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 9622 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
9623 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)
9604 tg3_get_5787_nvram_info(tp); 9624 tg3_get_5787_nvram_info(tp);
9605 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 9625 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
9606 tg3_get_5906_nvram_info(tp); 9626 tg3_get_5906_nvram_info(tp);
@@ -9913,6 +9933,7 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
9913 if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) && 9933 if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) &&
9914 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755) && 9934 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755) &&
9915 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) && 9935 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) &&
9936 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784) &&
9916 (tp->nvram_jedecnum == JEDEC_ST) && 9937 (tp->nvram_jedecnum == JEDEC_ST) &&
9917 (nvram_cmd & NVRAM_CMD_FIRST)) { 9938 (nvram_cmd & NVRAM_CMD_FIRST)) {
9918 9939
@@ -10657,6 +10678,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10657 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || 10678 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
10658 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 10679 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
10659 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || 10680 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
10681 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
10660 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 || 10682 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 ||
10661 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) 10683 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
10662 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; 10684 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
@@ -10676,6 +10698,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10676 10698
10677 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 10699 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
10678 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || 10700 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
10701 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
10679 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { 10702 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
10680 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2; 10703 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2;
10681 tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI; 10704 tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
@@ -10693,6 +10716,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10693 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752 && 10716 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752 &&
10694 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755 && 10717 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755 &&
10695 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787 && 10718 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787 &&
10719 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5784 &&
10696 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) 10720 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)
10697 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; 10721 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
10698 10722
@@ -10868,6 +10892,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10868 */ 10892 */
10869 tg3_get_eeprom_hw_cfg(tp); 10893 tg3_get_eeprom_hw_cfg(tp);
10870 10894
10895 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)
10896 tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
10897
10871 /* Set up tp->grc_local_ctrl before calling tg3_set_power_state(). 10898 /* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
10872 * GPIO1 driven high will bring 5700's external PHY out of reset. 10899 * GPIO1 driven high will bring 5700's external PHY out of reset.
10873 * It is also used as eeprom write protect on LOMs. 10900 * It is also used as eeprom write protect on LOMs.
@@ -10934,7 +10961,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10934 10961
10935 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { 10962 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
10936 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 10963 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
10937 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) { 10964 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
10965 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784) {
10938 if (tp->pdev->device != PCI_DEVICE_ID_TIGON3_5756 && 10966 if (tp->pdev->device != PCI_DEVICE_ID_TIGON3_5756 &&
10939 tp->pdev->device != PCI_DEVICE_ID_TIGON3_5722) 10967 tp->pdev->device != PCI_DEVICE_ID_TIGON3_5722)
10940 tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG; 10968 tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG;
@@ -11077,6 +11105,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
11077 */ 11105 */
11078 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 11106 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
11079 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || 11107 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
11108 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
11080 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 11109 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
11081 tp->dev->hard_start_xmit = tg3_start_xmit; 11110 tp->dev->hard_start_xmit = tg3_start_xmit;
11082 else 11111 else
@@ -11698,6 +11727,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
11698 case PHY_ID_BCM5780: return "5780"; 11727 case PHY_ID_BCM5780: return "5780";
11699 case PHY_ID_BCM5755: return "5755"; 11728 case PHY_ID_BCM5755: return "5755";
11700 case PHY_ID_BCM5787: return "5787"; 11729 case PHY_ID_BCM5787: return "5787";
11730 case PHY_ID_BCM5784: return "5784";
11701 case PHY_ID_BCM5756: return "5722/5756"; 11731 case PHY_ID_BCM5756: return "5722/5756";
11702 case PHY_ID_BCM5906: return "5906"; 11732 case PHY_ID_BCM5906: return "5906";
11703 case PHY_ID_BCM8002: return "8002/serdes"; 11733 case PHY_ID_BCM8002: return "8002/serdes";
@@ -12042,7 +12072,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
12042 if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) { 12072 if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) {
12043 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; 12073 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
12044 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 12074 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
12045 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 12075 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
12076 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784)
12046 dev->features |= NETIF_F_IPV6_CSUM; 12077 dev->features |= NETIF_F_IPV6_CSUM;
12047 12078
12048 tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; 12079 tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 79ce68cf836b..d8e829f6fcb2 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -108,6 +108,7 @@
108#define CHIPREV_ID_5752_A1 0x6001 108#define CHIPREV_ID_5752_A1 0x6001
109#define CHIPREV_ID_5714_A2 0x9002 109#define CHIPREV_ID_5714_A2 0x9002
110#define CHIPREV_ID_5906_A1 0xc001 110#define CHIPREV_ID_5906_A1 0xc001
111#define CHIPREV_ID_5784_A0 0x5784000
111#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) 112#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
112#define ASIC_REV_5700 0x07 113#define ASIC_REV_5700 0x07
113#define ASIC_REV_5701 0x00 114#define ASIC_REV_5701 0x00
@@ -122,6 +123,7 @@
122#define ASIC_REV_5787 0x0b 123#define ASIC_REV_5787 0x0b
123#define ASIC_REV_5906 0x0c 124#define ASIC_REV_5906 0x0c
124#define ASIC_REV_USE_PROD_ID_REG 0x0f 125#define ASIC_REV_USE_PROD_ID_REG 0x0f
126#define ASIC_REV_5784 0x5784
125#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 127#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
126#define CHIPREV_5700_AX 0x70 128#define CHIPREV_5700_AX 0x70
127#define CHIPREV_5700_BX 0x71 129#define CHIPREV_5700_BX 0x71
@@ -843,7 +845,13 @@
843#define RCVLSC_MODE_ATTN_ENABLE 0x00000004 845#define RCVLSC_MODE_ATTN_ENABLE 0x00000004
844#define RCVLSC_STATUS 0x00003404 846#define RCVLSC_STATUS 0x00003404
845#define RCVLSC_STATUS_ERROR_ATTN 0x00000004 847#define RCVLSC_STATUS_ERROR_ATTN 0x00000004
846/* 0x3408 --> 0x3800 unused */ 848/* 0x3408 --> 0x3600 unused */
849
850/* CPMU registers */
851#define TG3_CPMU_CTRL 0x00003600
852#define CPMU_CTRL_LINK_IDLE_MODE 0x00000200
853#define CPMU_CTRL_LINK_AWARE_MODE 0x00000400
854/* 0x3604 --> 0x3800 unused */
847 855
848/* Mbuf cluster free registers */ 856/* Mbuf cluster free registers */
849#define MBFREE_MODE 0x00003800 857#define MBFREE_MODE 0x00003800
@@ -1023,7 +1031,10 @@
1023#define RDMAC_MODE_FIFOOREAD_ENAB 0x00000100 1031#define RDMAC_MODE_FIFOOREAD_ENAB 0x00000100
1024#define RDMAC_MODE_LNGREAD_ENAB 0x00000200 1032#define RDMAC_MODE_LNGREAD_ENAB 0x00000200
1025#define RDMAC_MODE_SPLIT_ENABLE 0x00000800 1033#define RDMAC_MODE_SPLIT_ENABLE 0x00000800
1034#define RDMAC_MODE_BD_SBD_CRPT_ENAB 0x00000800
1026#define RDMAC_MODE_SPLIT_RESET 0x00001000 1035#define RDMAC_MODE_SPLIT_RESET 0x00001000
1036#define RDMAC_MODE_MBUF_RBD_CRPT_ENAB 0x00001000
1037#define RDMAC_MODE_MBUF_SBD_CRPT_ENAB 0x00002000
1027#define RDMAC_MODE_FIFO_SIZE_128 0x00020000 1038#define RDMAC_MODE_FIFO_SIZE_128 0x00020000
1028#define RDMAC_MODE_FIFO_LONG_BURST 0x00030000 1039#define RDMAC_MODE_FIFO_LONG_BURST 0x00030000
1029#define RDMAC_STATUS 0x00004804 1040#define RDMAC_STATUS 0x00004804
@@ -2315,6 +2326,7 @@ struct tg3 {
2315#define PHY_ID_BCM5755 0xbc050cc0 2326#define PHY_ID_BCM5755 0xbc050cc0
2316#define PHY_ID_BCM5787 0xbc050ce0 2327#define PHY_ID_BCM5787 0xbc050ce0
2317#define PHY_ID_BCM5756 0xbc050ed0 2328#define PHY_ID_BCM5756 0xbc050ed0
2329#define PHY_ID_BCM5784 0xbc050fa0
2318#define PHY_ID_BCM5906 0xdc00ac40 2330#define PHY_ID_BCM5906 0xdc00ac40
2319#define PHY_ID_BCM8002 0x60010140 2331#define PHY_ID_BCM8002 0x60010140
2320#define PHY_ID_INVALID 0xffffffff 2332#define PHY_ID_INVALID 0xffffffff