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authorDhananjay Phadke <dhananjay@netxen.com>2009-08-24 15:23:27 -0400
committerDavid S. Miller <davem@davemloft.net>2009-08-26 18:29:19 -0400
commit3ad4467ca43e7a2556e26e4e304faf3385048834 (patch)
tree5b3e263674604ec0f15211f3de10d3cc65e93f63 /drivers/net
parentc9517e5893db03ca8bd32b8783b39af58176947c (diff)
netxen: remove netxen_nic_niu.c
Consolidate all MAC/PHY access functions into netxen_nic_hw.c Signed-off-by: Dhananjay Phadke <dhananjay@netxen.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/netxen/Makefile2
-rw-r--r--drivers/net/netxen/netxen_nic.h27
-rw-r--r--drivers/net/netxen/netxen_nic_ctx.c38
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c79
-rw-r--r--drivers/net/netxen/netxen_nic_init.c10
-rw-r--r--drivers/net/netxen/netxen_nic_niu.c275
6 files changed, 141 insertions, 290 deletions
diff --git a/drivers/net/netxen/Makefile b/drivers/net/netxen/Makefile
index cf01a9130c91..a70b682f616b 100644
--- a/drivers/net/netxen/Makefile
+++ b/drivers/net/netxen/Makefile
@@ -31,4 +31,4 @@
31obj-$(CONFIG_NETXEN_NIC) := netxen_nic.o 31obj-$(CONFIG_NETXEN_NIC) := netxen_nic.o
32 32
33netxen_nic-y := netxen_nic_hw.o netxen_nic_main.o netxen_nic_init.o \ 33netxen_nic-y := netxen_nic_hw.o netxen_nic_main.o netxen_nic_init.o \
34 netxen_nic_ethtool.o netxen_nic_niu.o netxen_nic_ctx.o 34 netxen_nic_ethtool.o netxen_nic_ctx.o
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index 061e8aa419b0..63e2f793ae0e 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -684,7 +684,19 @@ struct netxen_recv_context {
684#define NX_CDRP_CMD_GET_STATISTICS 0x0000000f 684#define NX_CDRP_CMD_GET_STATISTICS 0x0000000f
685#define NX_CDRP_CMD_DELETE_STATISTICS 0x00000010 685#define NX_CDRP_CMD_DELETE_STATISTICS 0x00000010
686#define NX_CDRP_CMD_SET_MTU 0x00000012 686#define NX_CDRP_CMD_SET_MTU 0x00000012
687#define NX_CDRP_CMD_MAX 0x00000013 687#define NX_CDRP_CMD_READ_PHY 0x00000013
688#define NX_CDRP_CMD_WRITE_PHY 0x00000014
689#define NX_CDRP_CMD_READ_HW_REG 0x00000015
690#define NX_CDRP_CMD_GET_FLOW_CTL 0x00000016
691#define NX_CDRP_CMD_SET_FLOW_CTL 0x00000017
692#define NX_CDRP_CMD_READ_MAX_MTU 0x00000018
693#define NX_CDRP_CMD_READ_MAX_LRO 0x00000019
694#define NX_CDRP_CMD_CONFIGURE_TOE 0x0000001a
695#define NX_CDRP_CMD_FUNC_ATTRIB 0x0000001b
696#define NX_CDRP_CMD_READ_PEXQ_PARAMETERS 0x0000001c
697#define NX_CDRP_CMD_GET_LIC_CAPABILITIES 0x0000001d
698#define NX_CDRP_CMD_READ_MAX_LRO_PER_BOARD 0x0000001e
699#define NX_CDRP_CMD_MAX 0x0000001f
688 700
689#define NX_RCODE_SUCCESS 0 701#define NX_RCODE_SUCCESS 0
690#define NX_RCODE_NO_HOST_MEM 1 702#define NX_RCODE_NO_HOST_MEM 1
@@ -1152,8 +1164,8 @@ struct netxen_adapter {
1152 int (*set_mtu) (struct netxen_adapter *, int); 1164 int (*set_mtu) (struct netxen_adapter *, int);
1153 int (*set_promisc) (struct netxen_adapter *, u32); 1165 int (*set_promisc) (struct netxen_adapter *, u32);
1154 void (*set_multi) (struct net_device *); 1166 void (*set_multi) (struct net_device *);
1155 int (*phy_read) (struct netxen_adapter *, long reg, u32 *); 1167 int (*phy_read) (struct netxen_adapter *, u32 reg, u32 *);
1156 int (*phy_write) (struct netxen_adapter *, long reg, u32 val); 1168 int (*phy_write) (struct netxen_adapter *, u32 reg, u32 val);
1157 int (*init_port) (struct netxen_adapter *, int); 1169 int (*init_port) (struct netxen_adapter *, int);
1158 int (*stop_port) (struct netxen_adapter *); 1170 int (*stop_port) (struct netxen_adapter *);
1159 1171
@@ -1185,15 +1197,11 @@ struct netxen_adapter {
1185 const struct firmware *fw; 1197 const struct firmware *fw;
1186}; 1198};
1187 1199
1188int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
1189 u32 mode);
1190int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port); 1200int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port);
1191int netxen_niu_disable_xg_port(struct netxen_adapter *adapter); 1201int netxen_niu_disable_xg_port(struct netxen_adapter *adapter);
1192 1202
1193int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg, 1203int nx_fw_cmd_query_phy(struct netxen_adapter *adapter, u32 reg, u32 *val);
1194 __u32 * readval); 1204int nx_fw_cmd_set_phy(struct netxen_adapter *adapter, u32 reg, u32 val);
1195int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter,
1196 long reg, __u32 val);
1197 1205
1198/* Functions available from netxen_nic_hw.c */ 1206/* Functions available from netxen_nic_hw.c */
1199int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu); 1207int netxen_nic_set_mtu_xgb(struct netxen_adapter *adapter, int new_mtu);
@@ -1313,6 +1321,7 @@ int netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max);
1313void netxen_p2_nic_set_multi(struct net_device *netdev); 1321void netxen_p2_nic_set_multi(struct net_device *netdev);
1314void netxen_p3_nic_set_multi(struct net_device *netdev); 1322void netxen_p3_nic_set_multi(struct net_device *netdev);
1315void netxen_p3_free_mac_list(struct netxen_adapter *adapter); 1323void netxen_p3_free_mac_list(struct netxen_adapter *adapter);
1324int netxen_p2_nic_set_promisc(struct netxen_adapter *adapter, u32 mode);
1316int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32); 1325int netxen_p3_nic_set_promisc(struct netxen_adapter *adapter, u32);
1317int netxen_config_intr_coalesce(struct netxen_adapter *adapter); 1326int netxen_config_intr_coalesce(struct netxen_adapter *adapter);
1318int netxen_config_rss(struct netxen_adapter *adapter, int enable); 1327int netxen_config_rss(struct netxen_adapter *adapter, int enable);
diff --git a/drivers/net/netxen/netxen_nic_ctx.c b/drivers/net/netxen/netxen_nic_ctx.c
index ef846b43390a..0f42ab998368 100644
--- a/drivers/net/netxen/netxen_nic_ctx.c
+++ b/drivers/net/netxen/netxen_nic_ctx.c
@@ -380,6 +380,44 @@ nx_fw_cmd_destroy_tx_ctx(struct netxen_adapter *adapter)
380 } 380 }
381} 381}
382 382
383int
384nx_fw_cmd_query_phy(struct netxen_adapter *adapter, u32 reg, u32 *val)
385{
386 u32 rcode;
387
388 rcode = netxen_issue_cmd(adapter,
389 adapter->ahw.pci_func,
390 NXHAL_VERSION,
391 reg,
392 0,
393 0,
394 NX_CDRP_CMD_READ_PHY);
395
396 if (rcode != NX_RCODE_SUCCESS)
397 return -EIO;
398
399 return NXRD32(adapter, NX_ARG1_CRB_OFFSET);
400}
401
402int
403nx_fw_cmd_set_phy(struct netxen_adapter *adapter, u32 reg, u32 val)
404{
405 u32 rcode;
406
407 rcode = netxen_issue_cmd(adapter,
408 adapter->ahw.pci_func,
409 NXHAL_VERSION,
410 reg,
411 val,
412 0,
413 NX_CDRP_CMD_WRITE_PHY);
414
415 if (rcode != NX_RCODE_SUCCESS)
416 return -EIO;
417
418 return 0;
419}
420
383static u64 ctx_addr_sig_regs[][3] = { 421static u64 ctx_addr_sig_regs[][3] = {
384 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)}, 422 {NETXEN_NIC_REG(0x188), NETXEN_NIC_REG(0x18c), NETXEN_NIC_REG(0x1c0)},
385 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)}, 423 {NETXEN_NIC_REG(0x190), NETXEN_NIC_REG(0x194), NETXEN_NIC_REG(0x1c4)},
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index cbfe44c8a7fd..1a8ad62e12ee 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -348,6 +348,35 @@ netxen_pcie_sem_unlock(struct netxen_adapter *adapter, int sem)
348 val = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_UNLOCK(sem))); 348 val = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_UNLOCK(sem)));
349} 349}
350 350
351int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
352{
353 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
354 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
355 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
356 }
357
358 return 0;
359}
360
361/* Disable an XG interface */
362int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
363{
364 __u32 mac_cfg;
365 u32 port = adapter->physical_port;
366
367 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
368 return 0;
369
370 if (port > NETXEN_NIU_MAX_XG_PORTS)
371 return -EINVAL;
372
373 mac_cfg = 0;
374 if (NXWR32(adapter,
375 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg))
376 return -EIO;
377 return 0;
378}
379
351#define NETXEN_UNICAST_ADDR(port, index) \ 380#define NETXEN_UNICAST_ADDR(port, index) \
352 (NETXEN_UNICAST_ADDR_BASE+(port*32)+(index*8)) 381 (NETXEN_UNICAST_ADDR_BASE+(port*32)+(index*8))
353#define NETXEN_MCAST_ADDR(port, index) \ 382#define NETXEN_MCAST_ADDR(port, index) \
@@ -357,6 +386,56 @@ netxen_pcie_sem_unlock(struct netxen_adapter *adapter, int sem)
357#define MAC_LO(addr) \ 386#define MAC_LO(addr) \
358 ((addr[5] << 16) | (addr[4] << 8) | (addr[3])) 387 ((addr[5] << 16) | (addr[4] << 8) | (addr[3]))
359 388
389int netxen_p2_nic_set_promisc(struct netxen_adapter *adapter, u32 mode)
390{
391 __u32 reg;
392 u32 port = adapter->physical_port;
393
394 if (port > NETXEN_NIU_MAX_XG_PORTS)
395 return -EINVAL;
396
397 reg = NXRD32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port));
398 if (mode == NETXEN_NIU_PROMISC_MODE)
399 reg = (reg | 0x2000UL);
400 else
401 reg = (reg & ~0x2000UL);
402
403 if (mode == NETXEN_NIU_ALLMULTI_MODE)
404 reg = (reg | 0x1000UL);
405 else
406 reg = (reg & ~0x1000UL);
407
408 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
409
410 return 0;
411}
412
413int netxen_p2_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr)
414{
415 u32 mac_hi, mac_lo;
416 u32 reg_hi, reg_lo;
417
418 u8 phy = adapter->physical_port;
419
420 if (phy >= NETXEN_NIU_MAX_XG_PORTS)
421 return -EINVAL;
422
423 mac_lo = ((u32)addr[0] << 16) | ((u32)addr[1] << 24);
424 mac_hi = addr[2] | ((u32)addr[3] << 8) |
425 ((u32)addr[4] << 16) | ((u32)addr[5] << 24);
426
427 reg_lo = NETXEN_NIU_XGE_STATION_ADDR_0_1 + (0x10000 * phy);
428 reg_hi = NETXEN_NIU_XGE_STATION_ADDR_0_HI + (0x10000 * phy);
429
430 /* write twice to flush */
431 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
432 return -EIO;
433 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
434 return -EIO;
435
436 return 0;
437}
438
360static int 439static int
361netxen_nic_enable_mcast_filter(struct netxen_adapter *adapter) 440netxen_nic_enable_mcast_filter(struct netxen_adapter *adapter)
362{ 441{
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 313cd261b2b0..8d4aa6f74bff 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -328,17 +328,17 @@ void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
328 adapter->macaddr_set = netxen_p2_nic_set_mac_addr; 328 adapter->macaddr_set = netxen_p2_nic_set_mac_addr;
329 adapter->set_multi = netxen_p2_nic_set_multi; 329 adapter->set_multi = netxen_p2_nic_set_multi;
330 adapter->set_mtu = netxen_nic_set_mtu_xgb; 330 adapter->set_mtu = netxen_nic_set_mtu_xgb;
331 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode; 331 adapter->set_promisc = netxen_p2_nic_set_promisc;
332 } else { 332 } else {
333 adapter->set_mtu = nx_fw_cmd_set_mtu; 333 adapter->set_mtu = nx_fw_cmd_set_mtu;
334 adapter->set_promisc = netxen_p3_nic_set_promisc; 334 adapter->set_promisc = netxen_p3_nic_set_promisc;
335 adapter->macaddr_set = netxen_p3_nic_set_mac_addr; 335 adapter->macaddr_set = netxen_p3_nic_set_mac_addr;
336 adapter->set_multi = netxen_p3_nic_set_multi; 336 adapter->set_multi = netxen_p3_nic_set_multi;
337 }
338 337
339 if (adapter->ahw.port_type == NETXEN_NIC_GBE) { 338 if (adapter->ahw.port_type == NETXEN_NIC_GBE) {
340 adapter->phy_read = netxen_niu_gbe_phy_read; 339 adapter->phy_read = nx_fw_cmd_query_phy;
341 adapter->phy_write = netxen_niu_gbe_phy_write; 340 adapter->phy_write = nx_fw_cmd_set_phy;
341 }
342 } 342 }
343} 343}
344 344
diff --git a/drivers/net/netxen/netxen_nic_niu.c b/drivers/net/netxen/netxen_nic_niu.c
deleted file mode 100644
index 1392e8994f2c..000000000000
--- a/drivers/net/netxen/netxen_nic_niu.c
+++ /dev/null
@@ -1,275 +0,0 @@
1/*
2 * Copyright (C) 2003 - 2009 NetXen, Inc.
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
19 *
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
22 *
23 * Contact Information:
24 * info@netxen.com
25 * NetXen Inc,
26 * 18922 Forge Drive
27 * Cupertino, CA 95014-0701
28 *
29 */
30
31#include "netxen_nic.h"
32
33/*
34 * netxen_niu_gbe_phy_read - read a register from the GbE PHY via
35 * mii management interface.
36 *
37 * Note: The MII management interface goes through port 0.
38 * Individual phys are addressed as follows:
39 * @param phy [15:8] phy id
40 * @param reg [7:0] register number
41 *
42 * @returns 0 on success
43 * -1 on error
44 *
45 */
46int netxen_niu_gbe_phy_read(struct netxen_adapter *adapter, long reg,
47 __u32 * readval)
48{
49 long timeout = 0;
50 long result = 0;
51 long restore = 0;
52 long phy = adapter->physical_port;
53 __u32 address;
54 __u32 command;
55 __u32 status;
56 __u32 mac_cfg0;
57
58 if (netxen_phy_lock(adapter) != 0)
59 return -1;
60
61 /*
62 * MII mgmt all goes through port 0 MAC interface,
63 * so it cannot be in reset
64 */
65
66 mac_cfg0 = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0));
67 if (netxen_gb_get_soft_reset(mac_cfg0)) {
68 __u32 temp;
69 temp = 0;
70 netxen_gb_tx_reset_pb(temp);
71 netxen_gb_rx_reset_pb(temp);
72 netxen_gb_tx_reset_mac(temp);
73 netxen_gb_rx_reset_mac(temp);
74 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
75 return -EIO;
76 restore = 1;
77 }
78
79 address = 0;
80 netxen_gb_mii_mgmt_reg_addr(address, reg);
81 netxen_gb_mii_mgmt_phy_addr(address, phy);
82 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
83 return -EIO;
84 command = 0; /* turn off any prior activity */
85 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
86 return -EIO;
87 /* send read command */
88 netxen_gb_mii_mgmt_set_read_cycle(command);
89 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
90 return -EIO;
91
92 status = 0;
93 do {
94 status = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
95 timeout++;
96 } while ((netxen_get_gb_mii_mgmt_busy(status)
97 || netxen_get_gb_mii_mgmt_notvalid(status))
98 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
99
100 if (timeout < NETXEN_NIU_PHY_WAITMAX) {
101 *readval = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_STATUS(0));
102 result = 0;
103 } else
104 result = -1;
105
106 if (restore)
107 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
108 return -EIO;
109 netxen_phy_unlock(adapter);
110 return result;
111}
112
113/*
114 * netxen_niu_gbe_phy_write - write a register to the GbE PHY via
115 * mii management interface.
116 *
117 * Note: The MII management interface goes through port 0.
118 * Individual phys are addressed as follows:
119 * @param phy [15:8] phy id
120 * @param reg [7:0] register number
121 *
122 * @returns 0 on success
123 * -1 on error
124 *
125 */
126int netxen_niu_gbe_phy_write(struct netxen_adapter *adapter, long reg,
127 __u32 val)
128{
129 long timeout = 0;
130 long result = 0;
131 long restore = 0;
132 long phy = adapter->physical_port;
133 __u32 address;
134 __u32 command;
135 __u32 status;
136 __u32 mac_cfg0;
137
138 /*
139 * MII mgmt all goes through port 0 MAC interface, so it
140 * cannot be in reset
141 */
142
143 mac_cfg0 = NXRD32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0));
144 if (netxen_gb_get_soft_reset(mac_cfg0)) {
145 __u32 temp;
146 temp = 0;
147 netxen_gb_tx_reset_pb(temp);
148 netxen_gb_rx_reset_pb(temp);
149 netxen_gb_tx_reset_mac(temp);
150 netxen_gb_rx_reset_mac(temp);
151
152 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), temp))
153 return -EIO;
154 restore = 1;
155 }
156
157 command = 0; /* turn off any prior activity */
158 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_COMMAND(0), command))
159 return -EIO;
160
161 address = 0;
162 netxen_gb_mii_mgmt_reg_addr(address, reg);
163 netxen_gb_mii_mgmt_phy_addr(address, phy);
164 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_ADDR(0), address))
165 return -EIO;
166
167 if (NXWR32(adapter, NETXEN_NIU_GB_MII_MGMT_CTRL(0), val))
168 return -EIO;
169
170 status = 0;
171 do {
172 status = NXRD32(adapter, NETXEN_NIU_GB_MII_MGMT_INDICATE(0));
173 timeout++;
174 } while ((netxen_get_gb_mii_mgmt_busy(status))
175 && (timeout++ < NETXEN_NIU_PHY_WAITMAX));
176
177 if (timeout < NETXEN_NIU_PHY_WAITMAX)
178 result = 0;
179 else
180 result = -EIO;
181
182 /* restore the state of port 0 MAC in case we tampered with it */
183 if (restore)
184 if (NXWR32(adapter, NETXEN_NIU_GB_MAC_CONFIG_0(0), mac_cfg0))
185 return -EIO;
186
187 return result;
188}
189
190int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
191{
192 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
193 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1+(0x10000*port), 0x1447);
194 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_0+(0x10000*port), 0x5);
195 }
196
197 return 0;
198}
199
200/* Disable an XG interface */
201int netxen_niu_disable_xg_port(struct netxen_adapter *adapter)
202{
203 __u32 mac_cfg;
204 u32 port = adapter->physical_port;
205
206 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
207 return 0;
208
209 if (port > NETXEN_NIU_MAX_XG_PORTS)
210 return -EINVAL;
211
212 mac_cfg = 0;
213 if (NXWR32(adapter,
214 NETXEN_NIU_XGE_CONFIG_0 + (0x10000 * port), mac_cfg))
215 return -EIO;
216 return 0;
217}
218
219int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
220 u32 mode)
221{
222 __u32 reg;
223 u32 port = adapter->physical_port;
224
225 if (port > NETXEN_NIU_MAX_XG_PORTS)
226 return -EINVAL;
227
228 reg = NXRD32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port));
229 if (mode == NETXEN_NIU_PROMISC_MODE)
230 reg = (reg | 0x2000UL);
231 else
232 reg = (reg & ~0x2000UL);
233
234 if (mode == NETXEN_NIU_ALLMULTI_MODE)
235 reg = (reg | 0x1000UL);
236 else
237 reg = (reg & ~0x1000UL);
238
239 NXWR32(adapter, NETXEN_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);
240
241 return 0;
242}
243
244int netxen_p2_nic_set_mac_addr(struct netxen_adapter *adapter, u8 *addr)
245{
246 u32 mac_hi, mac_lo;
247 u32 reg_hi, reg_lo;
248
249 u8 phy = adapter->physical_port;
250 u8 phy_count = (adapter->ahw.port_type == NETXEN_NIC_XGBE) ?
251 NETXEN_NIU_MAX_XG_PORTS : NETXEN_NIU_MAX_GBE_PORTS;
252
253 if (phy >= phy_count)
254 return -EINVAL;
255
256 mac_lo = ((u32)addr[0] << 16) | ((u32)addr[1] << 24);
257 mac_hi = addr[2] | ((u32)addr[3] << 8) |
258 ((u32)addr[4] << 16) | ((u32)addr[5] << 24);
259
260 if (adapter->ahw.port_type == NETXEN_NIC_XGBE) {
261 reg_lo = NETXEN_NIU_XGE_STATION_ADDR_0_1 + (0x10000 * phy);
262 reg_hi = NETXEN_NIU_XGE_STATION_ADDR_0_HI + (0x10000 * phy);
263 } else {
264 reg_lo = NETXEN_NIU_GB_STATION_ADDR_1(phy);
265 reg_hi = NETXEN_NIU_GB_STATION_ADDR_0(phy);
266 }
267
268 /* write twice to flush */
269 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
270 return -EIO;
271 if (NXWR32(adapter, reg_lo, mac_lo) || NXWR32(adapter, reg_hi, mac_hi))
272 return -EIO;
273
274 return 0;
275}