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authorYaniv Rosner <yaniv.rosner@broadcom.com>2010-11-01 01:32:31 -0400
committerDavid S. Miller <davem@davemloft.net>2010-11-01 09:21:37 -0400
commit6a71bbe04c9ee9a6e892e584a09615c1dbf35edc (patch)
tree787013353bc38f2aea54cfde241b1c03548564f7 /drivers/net
parent9bffeac1eabe4162f5696f0d7f60aa32668f5061 (diff)
bnx2x: Fix port selection in case of E2
On E2 flavor, dual-port mode, the port argument used for some functions is needed as the global port number rather than the port per path. Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/bnx2x/bnx2x_link.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c
index b6588c5411ea..fc637ce7f57d 100644
--- a/drivers/net/bnx2x/bnx2x_link.c
+++ b/drivers/net/bnx2x/bnx2x_link.c
@@ -5442,7 +5442,7 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,
5442 struct link_vars *vars) 5442 struct link_vars *vars)
5443{ 5443{
5444 struct bnx2x *bp = params->bp; 5444 struct bnx2x *bp = params->bp;
5445 u8 port = params->port, initialize = 1; 5445 u8 port, initialize = 1;
5446 u16 val; 5446 u16 val;
5447 u16 temp; 5447 u16 temp;
5448 u32 actual_phy_selection; 5448 u32 actual_phy_selection;
@@ -5451,6 +5451,10 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,
5451 /* This is just for MDIO_CTL_REG_84823_MEDIA register. */ 5451 /* This is just for MDIO_CTL_REG_84823_MEDIA register. */
5452 5452
5453 msleep(1); 5453 msleep(1);
5454 if (CHIP_IS_E2(bp))
5455 port = BP_PATH(bp);
5456 else
5457 port = params->port;
5454 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, 5458 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3,
5455 MISC_REGISTERS_GPIO_OUTPUT_HIGH, 5459 MISC_REGISTERS_GPIO_OUTPUT_HIGH,
5456 port); 5460 port);
@@ -5627,7 +5631,11 @@ static void bnx2x_848x3_link_reset(struct bnx2x_phy *phy,
5627 struct link_params *params) 5631 struct link_params *params)
5628{ 5632{
5629 struct bnx2x *bp = params->bp; 5633 struct bnx2x *bp = params->bp;
5630 u8 port = params->port; 5634 u8 port;
5635 if (CHIP_IS_E2(bp))
5636 port = BP_PATH(bp);
5637 else
5638 port = params->port;
5631 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, 5639 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3,
5632 MISC_REGISTERS_GPIO_OUTPUT_LOW, 5640 MISC_REGISTERS_GPIO_OUTPUT_LOW,
5633 port); 5641 port);
@@ -7023,7 +7031,8 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7023 return -EINVAL; 7031 return -EINVAL;
7024 } 7032 }
7025 /* disable attentions */ 7033 /* disable attentions */
7026 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 7034 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 +
7035 port_of_path*4,
7027 (NIG_MASK_XGXS0_LINK_STATUS | 7036 (NIG_MASK_XGXS0_LINK_STATUS |
7028 NIG_MASK_XGXS0_LINK10G | 7037 NIG_MASK_XGXS0_LINK10G |
7029 NIG_MASK_SERDES0_LINK_STATUS | 7038 NIG_MASK_SERDES0_LINK_STATUS |